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https://github.com/FEX-Emu/FEX.git
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lioncash
5f9052a675
In the event that the host doesn't support the requirements for running AVX-enabled applications (SVE2 with at least 256-bit wide vectors) but still wanted to run regular SSE-enabled applications, they would be taking a performance hit due to a load/store pessimization (necessary in order for 256-bit loads/stores to work) However, we can add an alternate view into the xmm data that would allow those hosts to use the previous optimization, while still supporting AVX-capable hosts.
104 lines
2.3 KiB
C++
104 lines
2.3 KiB
C++
/*
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$info$
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tags: ir|opts
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$end_info$
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*/
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#pragma once
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#include <FEXCore/Config/Config.h>
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#include <FEXCore/Utils/ThreadPoolAllocator.h>
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#include <functional>
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#include <memory>
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#include <utility>
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#include <vector>
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namespace FEXCore::HLE {
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class SyscallHandler;
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}
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namespace FEXCore::IR {
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class PassManager;
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class IREmitter;
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using ShouldExitHandler = std::function<void(void)>;
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class Pass {
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public:
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virtual ~Pass() = default;
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virtual bool Run(IREmitter *IREmit) = 0;
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void RegisterPassManager(PassManager *_Manager) {
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Manager = _Manager;
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}
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protected:
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PassManager *Manager;
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};
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class PassManager final {
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friend class SyscallOptimization;
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public:
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void AddDefaultPasses(FEXCore::Context::Context *ctx, bool InlineConstants, bool StaticRegisterAllocation);
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void AddDefaultValidationPasses();
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Pass* InsertPass(std::unique_ptr<Pass> Pass, std::string Name = "") {
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Pass->RegisterPassManager(this);
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auto PassPtr = Passes.emplace_back(std::move(Pass)).get();
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if (!Name.empty()) {
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NameToPassMaping[Name] = PassPtr;
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}
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return PassPtr;
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}
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void InsertRegisterAllocationPass(bool OptimizeSRA, bool SupportsAVX);
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bool Run(IREmitter *IREmit);
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void RegisterExitHandler(ShouldExitHandler Handler) {
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ExitHandler = std::move(Handler);
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}
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bool HasPass(std::string Name) const {
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return NameToPassMaping.contains(Name);
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}
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template<typename T>
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T* GetPass(std::string Name) {
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return dynamic_cast<T*>(NameToPassMaping[Name]);
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}
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Pass* GetPass(std::string Name) {
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return NameToPassMaping[Name];
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}
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void RegisterSyscallHandler(FEXCore::HLE::SyscallHandler *Handler) {
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SyscallHandler = Handler;
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}
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protected:
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ShouldExitHandler ExitHandler;
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FEXCore::HLE::SyscallHandler *SyscallHandler;
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private:
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std::vector<std::unique_ptr<Pass>> Passes;
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std::unordered_map<std::string, Pass*> NameToPassMaping;
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#if defined(ASSERTIONS_ENABLED) && ASSERTIONS_ENABLED
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std::vector<std::unique_ptr<Pass>> ValidationPasses;
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void InsertValidationPass(std::unique_ptr<Pass> Pass, std::string Name = "") {
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Pass->RegisterPassManager(this);
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auto PassPtr = ValidationPasses.emplace_back(std::move(Pass)).get();
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if (!Name.empty()) {
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NameToPassMaping[Name] = PassPtr;
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}
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}
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#endif
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FEX_CONFIG_OPT(Is64BitMode, IS64BIT_MODE);
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};
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}
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