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Alyssa Rosenzweig
65ee1fafa8
This sideband is now unused, registers are encoded directly in the IR. So we can garbage collect all this code for quite some savings. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
26 lines
499 B
C++
26 lines
499 B
C++
// SPDX-License-Identifier: MIT
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/*
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$info$
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tags: ir|opts
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$end_info$
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*/
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#pragma once
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#include "Interface/IR/PassManager.h"
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#include <memory>
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#include <stdint.h>
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namespace FEXCore::IR {
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struct RegisterClassType;
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class RegisterAllocationPass : public FEXCore::IR::Pass {
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public:
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virtual void AddRegisters(FEXCore::IR::RegisterClassType Class, uint32_t RegisterCount) = 0;
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// Number of GPRs usable for pairs at start of GPR set. Must be even.
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uint32_t PairRegs;
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};
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} // namespace FEXCore::IR
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