Lioncache d84577c36c VectorOps: Handle SVE VExtr a little better ...

If the source registers don't alias the destination, then we can
safely move the lower bits over to it without using a temporary.

2023-10-19 15:11:23 +02:00

..

Common

Merge pull request #3120 from Sonicadvance1/more_optimal_x87

2023-09-21 15:35:37 -07:00

Interface

VectorOps: Handle SVE VExtr a little better

2023-10-19 15:11:23 +02:00

Utils

FEXCore/Utils: Adds SPDX identifier

2023-09-19 17:33:14 -07:00

CMakeLists.txt

FEXCore/IR: Changes over to automated IR dispatch generation

2023-10-07 15:01:47 -07:00