mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-11 14:00:38 +02:00
124 lines
3.7 KiB
C++
124 lines
3.7 KiB
C++
#include <FEXCore/IR/IR.h>
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#include <FEXCore/IR/IntrusiveIRList.h>
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namespace FEXCore::IR {
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#define IROP_GETNAME_IMPL
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#include "IRDefines.inc"
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static void PrintArg(std::stringstream *out, [[maybe_unused]] IRListView<false> const* IR, uint64_t Arg) {
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*out << "0x" << std::hex << Arg;
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}
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static void PrintArg(std::stringstream *out, [[maybe_unused]] IRListView<false> const* IR, RegisterClassType Arg) {
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if (Arg == 0)
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*out << "GPR";
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else if (Arg == 1)
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*out << "FPR";
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else
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*out << "Unknown Registerclass " << Arg;
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}
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static void PrintArg(std::stringstream *out, IRListView<false> const* IR, OrderedNodeWrapper Arg) {
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uintptr_t Data = IR->GetData();
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uintptr_t ListBegin = IR->GetListData();
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OrderedNode *RealNode = Arg.GetNode(ListBegin);
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auto IROp = RealNode->Op(Data);
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*out << "%ssa" << std::to_string(Arg.ID()) << " i" << std::dec << (IROp->Size * 8);
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if (IROp->Elements > 1) {
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*out << "v" << std::dec << IROp->Elements;
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}
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}
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void Dump(std::stringstream *out, IRListView<false> const* IR) {
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uintptr_t ListBegin = IR->GetListData();
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uintptr_t DataBegin = IR->GetData();
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auto Begin = IR->begin();
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auto Op = Begin();
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OrderedNode *RealNode = Op->GetNode(ListBegin);
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auto HeaderOp = RealNode->Op(DataBegin)->CW<FEXCore::IR::IROp_IRHeader>();
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LogMan::Throw::A(HeaderOp->Header.Op == OP_IRHEADER, "First op wasn't IRHeader");
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OrderedNode *BlockNode = HeaderOp->Blocks.GetNode(ListBegin);
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uint8_t CurrentIndent = 0;
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auto AddIndent = [&out, &CurrentIndent]() {
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for (uint8_t i = 0; i < CurrentIndent; ++i) {
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*out << "\t";
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}
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};
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*out << "(%%ssa" << std::to_string(RealNode->Wrapped(ListBegin).ID()) << ") " << "IRHeader ";
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*out << "0x" << std::hex << HeaderOp->Entry << ", ";
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*out << "%%ssa" << HeaderOp->Blocks.ID() << ", ";
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*out << std::dec << HeaderOp->BlockCount << std::endl;
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while (1) {
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auto BlockIROp = BlockNode->Op(DataBegin)->CW<FEXCore::IR::IROp_CodeBlock>();
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LogMan::Throw::A(BlockIROp->Header.Op == OP_CODEBLOCK, "IR type failed to be a code block");
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// We grab these nodes this way so we can iterate easily
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auto CodeBegin = IR->at(BlockIROp->Begin);
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auto CodeLast = IR->at(BlockIROp->Last);
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*out << "(%%ssa" << std::to_string(BlockNode->Wrapped(ListBegin).ID()) << ") " << "CodeBlock ";
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*out << "%%ssa" << std::to_string(BlockIROp->Begin.ID()) << ", ";
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*out << "%%ssa" << std::to_string(BlockIROp->Last.ID()) << ", ";
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*out << "%%ssa" << std::to_string(BlockIROp->Next.ID()) << std::endl;
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while (1) {
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OrderedNodeWrapper *CodeOp = CodeBegin();
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OrderedNode *CodeNode = CodeOp->GetNode(ListBegin);
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auto IROp = CodeNode->Op(DataBegin);
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auto Name = FEXCore::IR::GetName(IROp->Op);
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AddIndent();
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if (IROp->HasDest) {
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*out << "%ssa" << std::to_string(CodeOp->ID()) << " i" << std::dec << (IROp->Size * 8);
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if (IROp->Elements > 1) {
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*out << "v" << std::dec << IROp->Elements;
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}
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*out << " = ";
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}
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else {
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*out << "(%%ssa" << std::to_string(CodeOp->ID()) << ") ";
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}
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*out << Name;
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switch (IROp->Op) {
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case IR::OP_BEGINBLOCK:
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*out << " %ssa" << std::to_string(CodeOp->ID());
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++CurrentIndent;
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break;
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case IR::OP_ENDBLOCK:
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--CurrentIndent;
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break;
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default: break;
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}
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#define IROP_ARGPRINTER_HELPER
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#include "IRDefines.inc"
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default: *out << "<Unknown Args>"; break;
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}
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*out << "\n";
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// CodeLast is inclusive. So we still need to dump the CodeLast op as well
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if (CodeBegin == CodeLast) {
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break;
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}
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++CodeBegin;
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}
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if (BlockIROp->Next.ID() == 0) {
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break;
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} else {
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BlockNode = BlockIROp->Next.GetNode(ListBegin);
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}
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}
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}
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}
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