Ryan Houdek cf5afbcd8d Some minor optimizations in the AArch64 ASM dispatcher ...

Ensures the top of the loop is 16byte aligned to give Cortex's
prefetcher the best chance of loading the code.

If the address size is a power of two (We always do 64GB or 32GB VM atm)
then do the address size masking in one instruction instead of loading a
64bit constant first

Move some accessed constants to a literal pool at the end of the ASM
dispatcher.

2020-09-02 16:00:17 -07:00

..

Config

Moves RunningMode to the config struct

2020-08-27 13:34:42 -07:00

Context

Moves our entire execution model over to signal execution

2020-09-02 16:00:17 -07:00

Core

Some minor optimizations in the AArch64 ASM dispatcher

2020-09-02 16:00:17 -07:00

HLE

Moves our entire execution model over to signal execution

2020-09-02 16:00:17 -07:00

IR

DCSE: Refactor LoadContext slightly

2020-08-26 00:47:40 +12:00

Memory

[WIP] Fork syscall support

2020-06-30 16:22:47 +03:00