mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-06 12:00:17 +02:00
786 lines
18 KiB
JSON
786 lines
18 KiB
JSON
{
|
|
"Features": {
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|
"Bitness": 64,
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|
"EnabledHostFeatures": [
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|
"SVE256"
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|
],
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|
"DisabledHostFeatures": [
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"FLAGM",
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|
"FLAGM2"
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|
]
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|
},
|
|
"Instructions": {
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|
"vpsrlw xmm0, xmm1, 0": {
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|
"ExpectedInstructionCount": 1,
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|
"Optimal": "Yes",
|
|
"Comment": [
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|
"Map group 12 0b010 128-bit"
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|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov v16.16b, v17.16b"
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|
]
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|
},
|
|
"vpsrlw xmm0, xmm1, 15": {
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|
"ExpectedInstructionCount": 1,
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|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b010 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"ushr v16.8h, v17.8h, #15"
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|
]
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|
},
|
|
"vpsrlw xmm0, xmm1, 16": {
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|
"ExpectedInstructionCount": 1,
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|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b010 128-bit"
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|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
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|
]
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|
},
|
|
"vpsrlw ymm0, ymm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b010 256-bit"
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|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov z16.d, p7/m, z17.d"
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|
]
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|
},
|
|
"vpsrlw ymm0, ymm1, 15": {
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|
"ExpectedInstructionCount": 2,
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|
"Optimal": "Yes",
|
|
"Comment": [
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|
"Map group 12 0b010 256-bit"
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|
],
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|
"ExpectedArm64ASM": [
|
|
"movprfx z16, z17",
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|
"lsr z16.h, p7/m, z16.h, #15"
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|
]
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|
},
|
|
"vpsrlw ymm0, ymm1, 16": {
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|
"ExpectedInstructionCount": 1,
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|
"Optimal": "Yes",
|
|
"Comment": [
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|
"Map group 12 0b010 256-bit"
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|
],
|
|
"ExpectedArm64ASM": [
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|
"movi v16.2d, #0x0"
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|
]
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|
},
|
|
"vpsraw xmm0, xmm1, 0": {
|
|
"ExpectedInstructionCount": 1,
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|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b100 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov v16.16b, v17.16b"
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|
]
|
|
},
|
|
"vpsraw xmm0, xmm1, 15": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b100 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"sshr v16.8h, v17.8h, #15"
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|
]
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|
},
|
|
"vpsraw xmm0, xmm1, 16": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b100 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"sshr v16.8h, v17.8h, #15"
|
|
]
|
|
},
|
|
"vpsraw ymm0, ymm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b100 256-bit"
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|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov z16.d, p7/m, z17.d"
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|
]
|
|
},
|
|
"vpsraw ymm0, ymm1, 15": {
|
|
"ExpectedInstructionCount": 2,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b100 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movprfx z16, z17",
|
|
"asr z16.h, p7/m, z16.h, #15"
|
|
]
|
|
},
|
|
"vpsraw ymm0, ymm1, 16": {
|
|
"ExpectedInstructionCount": 2,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b100 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movprfx z16, z17",
|
|
"asr z16.h, p7/m, z16.h, #15"
|
|
]
|
|
},
|
|
"vpsllw xmm0, xmm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b110 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov v16.16b, v17.16b"
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|
]
|
|
},
|
|
"vpsllw xmm0, xmm1, 15": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b110 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"shl v16.8h, v17.8h, #15"
|
|
]
|
|
},
|
|
"vpsllw xmm0, xmm1, 16": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b110 128-bit"
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|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
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|
]
|
|
},
|
|
"vpsllw ymm0, ymm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b110 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov z16.d, p7/m, z17.d"
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|
]
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|
},
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|
"vpsllw ymm0, ymm1, 15": {
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|
"ExpectedInstructionCount": 2,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b110 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movprfx z16, z17",
|
|
"lsl z16.h, p7/m, z16.h, #15"
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|
]
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|
},
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|
"vpsllw ymm0, ymm1, 16": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 12 0b110 256-bit"
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|
],
|
|
"ExpectedArm64ASM": [
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|
"movi v16.2d, #0x0"
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|
]
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},
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|
"vpsrld xmm0, xmm1, 0": {
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|
"ExpectedInstructionCount": 1,
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|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b010 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov v16.16b, v17.16b"
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|
]
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},
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"vpsrld xmm0, xmm1, 31": {
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"ExpectedInstructionCount": 1,
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|
"Optimal": "Yes",
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|
"Comment": [
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|
"Map group 13 0b010 128-bit"
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|
],
|
|
"ExpectedArm64ASM": [
|
|
"ushr v16.4s, v17.4s, #31"
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|
]
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|
},
|
|
"vpsrld xmm0, xmm1, 32": {
|
|
"ExpectedInstructionCount": 1,
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|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b010 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
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|
]
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|
},
|
|
"vpsrld ymm0, ymm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b010 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov z16.d, p7/m, z17.d"
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|
]
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|
},
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|
"vpsrld ymm0, ymm1, 31": {
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|
"ExpectedInstructionCount": 2,
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|
"Optimal": "Yes",
|
|
"Comment": [
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|
"Map group 13 0b010 256-bit"
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|
],
|
|
"ExpectedArm64ASM": [
|
|
"movprfx z16, z17",
|
|
"lsr z16.s, p7/m, z16.s, #31"
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|
]
|
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},
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|
"vpsrld ymm0, ymm1, 32": {
|
|
"ExpectedInstructionCount": 1,
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|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b010 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
|
|
]
|
|
},
|
|
"vpsrad xmm0, xmm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b100 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov v16.16b, v17.16b"
|
|
]
|
|
},
|
|
"vpsrad xmm0, xmm1, 31": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b100 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"sshr v16.4s, v17.4s, #31"
|
|
]
|
|
},
|
|
"vpsrad xmm0, xmm1, 32": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b100 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"sshr v16.4s, v17.4s, #31"
|
|
]
|
|
},
|
|
"vpsrad ymm0, ymm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b100 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov z16.d, p7/m, z17.d"
|
|
]
|
|
},
|
|
"vpsrad ymm0, ymm1, 31": {
|
|
"ExpectedInstructionCount": 2,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b100 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movprfx z16, z17",
|
|
"asr z16.s, p7/m, z16.s, #31"
|
|
]
|
|
},
|
|
"vpsrad ymm0, ymm1, 32": {
|
|
"ExpectedInstructionCount": 2,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b100 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movprfx z16, z17",
|
|
"asr z16.s, p7/m, z16.s, #31"
|
|
]
|
|
},
|
|
"vpslld xmm0, xmm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b110 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov v16.16b, v17.16b"
|
|
]
|
|
},
|
|
"vpslld xmm0, xmm1, 31": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b110 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"shl v16.4s, v17.4s, #31"
|
|
]
|
|
},
|
|
"vpslld xmm0, xmm1, 32": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b110 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
|
|
]
|
|
},
|
|
"vpslld ymm0, ymm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b110 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov z16.d, p7/m, z17.d"
|
|
]
|
|
},
|
|
"vpslld ymm0, ymm1, 31": {
|
|
"ExpectedInstructionCount": 2,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b110 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movprfx z16, z17",
|
|
"lsl z16.s, p7/m, z16.s, #31"
|
|
]
|
|
},
|
|
"vpslld ymm0, ymm1, 32": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 13 0b110 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
|
|
]
|
|
},
|
|
"vpsrlq xmm0, xmm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b010 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov v16.16b, v17.16b"
|
|
]
|
|
},
|
|
"vpsrlq xmm0, xmm1, 63": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b010 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"ushr v16.2d, v17.2d, #63"
|
|
]
|
|
},
|
|
"vpsrlq xmm0, xmm1, 64": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b010 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
|
|
]
|
|
},
|
|
"vpsrlq ymm0, ymm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b010 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov z16.d, p7/m, z17.d"
|
|
]
|
|
},
|
|
"vpsrlq ymm0, ymm1, 63": {
|
|
"ExpectedInstructionCount": 2,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b010 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movprfx z16, z17",
|
|
"lsr z16.d, p7/m, z16.d, #63"
|
|
]
|
|
},
|
|
"vpsrlq ymm0, ymm1, 64": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b010 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
|
|
]
|
|
},
|
|
"vpsrldq xmm0, xmm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b011 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov v16.16b, v17.16b"
|
|
]
|
|
},
|
|
"vpsrldq xmm0, xmm1, 15": {
|
|
"ExpectedInstructionCount": 2,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 14 0b011 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v2.2d, #0x0",
|
|
"ext v16.16b, v17.16b, v2.16b, #15"
|
|
]
|
|
},
|
|
"vpsrldq xmm0, xmm1, 16": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b011 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
|
|
]
|
|
},
|
|
"vpsrldq ymm0, ymm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b011 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov z16.d, p7/m, z17.d"
|
|
]
|
|
},
|
|
"vpsrldq ymm0, ymm1, 15": {
|
|
"ExpectedInstructionCount": 9,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 14 0b011 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v2.2d, #0x0",
|
|
"ext v3.16b, v17.16b, v2.16b, #15",
|
|
"movprfx z1, z17",
|
|
"ext z1.b, z1.b, z2.b, #31",
|
|
"mov z2.d, z1.d",
|
|
"mov z1.q, q2",
|
|
"mov z16.d, z3.d",
|
|
"not p0.b, p7/z, p6.b",
|
|
"mov z16.b, p0/m, z1.b"
|
|
]
|
|
},
|
|
"vpsrldq ymm0, ymm1, 16": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b011 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
|
|
]
|
|
},
|
|
"vpsllq xmm0, xmm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b110 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov v16.16b, v17.16b"
|
|
]
|
|
},
|
|
"vpsllq xmm0, xmm1, 63": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 14 0b110 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"shl v16.2d, v17.2d, #63"
|
|
]
|
|
},
|
|
"vpsllq xmm0, xmm1, 64": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 14 0b110 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
|
|
]
|
|
},
|
|
"vpsllq ymm0, ymm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b110 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov z16.d, p7/m, z17.d"
|
|
]
|
|
},
|
|
"vpsllq ymm0, ymm1, 63": {
|
|
"ExpectedInstructionCount": 2,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b110 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movprfx z16, z17",
|
|
"lsl z16.d, p7/m, z16.d, #63"
|
|
]
|
|
},
|
|
"vpsllq ymm0, ymm1, 64": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b110 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
|
|
]
|
|
},
|
|
"vpslldq xmm0, xmm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b111 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov v16.16b, v17.16b"
|
|
]
|
|
},
|
|
"vpslldq xmm0, xmm1, 15": {
|
|
"ExpectedInstructionCount": 2,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 14 0b111 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v2.2d, #0x0",
|
|
"ext v16.16b, v2.16b, v17.16b, #1"
|
|
]
|
|
},
|
|
"vpslldq xmm0, xmm1, 16": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b111 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
|
|
]
|
|
},
|
|
"vpslldq ymm0, ymm1, 0": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b111 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov z16.d, p7/m, z17.d"
|
|
]
|
|
},
|
|
"vpslldq ymm0, ymm1, 15": {
|
|
"ExpectedInstructionCount": 7,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 14 0b111 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v2.2d, #0x0",
|
|
"ext v3.16b, v2.16b, v17.16b, #1",
|
|
"ext z2.b, z2.b, z17.b, #17",
|
|
"mov z1.q, q2",
|
|
"mov z16.d, z3.d",
|
|
"not p0.b, p7/z, p6.b",
|
|
"mov z16.b, p0/m, z1.b"
|
|
]
|
|
},
|
|
"vpslldq ymm0, ymm1, 16": {
|
|
"ExpectedInstructionCount": 1,
|
|
"Optimal": "Yes",
|
|
"Comment": [
|
|
"Map group 14 0b111 256-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"movi v16.2d, #0x0"
|
|
]
|
|
},
|
|
"vldmxcsr [rax]": {
|
|
"ExpectedInstructionCount": 9,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 15 0b010"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"ldr w20, [x4]",
|
|
"ubfx w20, w20, #13, #3",
|
|
"rbit w1, w20",
|
|
"lsr w1, w1, #30",
|
|
"mrs x0, fpcr",
|
|
"bfi x0, x1, #22, #2",
|
|
"lsr x1, x20, #2",
|
|
"bfi x0, x1, #24, #1",
|
|
"msr fpcr, x0"
|
|
]
|
|
},
|
|
"vstmxcsr [rax]": {
|
|
"ExpectedInstructionCount": 7,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 15 0b011"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov w20, #0x1f80",
|
|
"mrs x21, fpcr",
|
|
"ubfx x21, x21, #22, #3",
|
|
"rbit w0, w21",
|
|
"bfi x21, x0, #30, #2",
|
|
"bfi w20, w21, #13, #3",
|
|
"str w20, [x4]"
|
|
]
|
|
},
|
|
"blsr eax, ebx": {
|
|
"ExpectedInstructionCount": 10,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 17 0b001 32-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov w20, w7",
|
|
"sub x21, x20, #0x1 (1)",
|
|
"and x21, x21, x20",
|
|
"mov w4, w21",
|
|
"tst w21, w21",
|
|
"mrs x21, nzcv",
|
|
"cmp x20, #0x0 (0)",
|
|
"cset x20, ne",
|
|
"orr w20, w21, w20, lsl #29",
|
|
"msr nzcv, x20"
|
|
]
|
|
},
|
|
"blsr rax, rbx": {
|
|
"ExpectedInstructionCount": 8,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 17 0b001 64-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"sub x20, x7, #0x1 (1)",
|
|
"and x4, x20, x7",
|
|
"tst x4, x4",
|
|
"mrs x20, nzcv",
|
|
"cmp x7, #0x0 (0)",
|
|
"cset x21, ne",
|
|
"orr w20, w20, w21, lsl #29",
|
|
"msr nzcv, x20"
|
|
]
|
|
},
|
|
"blsmsk eax, ebx": {
|
|
"ExpectedInstructionCount": 13,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 17 0b010 32-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov w20, w7",
|
|
"sub x21, x20, #0x1 (1)",
|
|
"eor x21, x21, x20",
|
|
"mov w4, w21",
|
|
"mov w21, #0x50000000",
|
|
"mrs x22, nzcv",
|
|
"bic x21, x22, x21",
|
|
"cmp x20, #0x0 (0)",
|
|
"cset x20, ne",
|
|
"mov w0, w21",
|
|
"bfi w0, w20, #29, #1",
|
|
"mov w20, w0",
|
|
"msr nzcv, x20"
|
|
]
|
|
},
|
|
"blsmsk rax, rbx": {
|
|
"ExpectedInstructionCount": 9,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 17 0b010 64-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"sub x20, x7, #0x1 (1)",
|
|
"eor x4, x20, x7",
|
|
"mov w20, #0x50000000",
|
|
"mrs x21, nzcv",
|
|
"bic x20, x21, x20",
|
|
"cmp x7, #0x0 (0)",
|
|
"cset x21, ne",
|
|
"bfi w20, w21, #29, #1",
|
|
"msr nzcv, x20"
|
|
]
|
|
},
|
|
"blsi eax, ebx": {
|
|
"ExpectedInstructionCount": 9,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 17 0b011 32-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov w20, w7",
|
|
"neg w21, w20",
|
|
"and w4, w20, w21",
|
|
"tst w4, w4",
|
|
"mrs x20, nzcv",
|
|
"cmp x4, #0x0 (0)",
|
|
"cset x21, ne",
|
|
"orr w20, w20, w21, lsl #29",
|
|
"msr nzcv, x20"
|
|
]
|
|
},
|
|
"blsi rax, rbx": {
|
|
"ExpectedInstructionCount": 8,
|
|
"Optimal": "No",
|
|
"Comment": [
|
|
"Map group 17 0b011 64-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"neg x20, x7",
|
|
"and x4, x7, x20",
|
|
"tst x4, x4",
|
|
"mrs x20, nzcv",
|
|
"cmp x4, #0x0 (0)",
|
|
"cset x21, ne",
|
|
"orr w20, w20, w21, lsl #29",
|
|
"msr nzcv, x20"
|
|
]
|
|
}
|
|
}
|
|
}
|