Billy Laws 8d7071e549 VectorOps: Fix MAXPS/MAXPD NaN and signed-zero tie selection ...

fcmgt returns false on NaN, so the existing polarity in the non-SVE
fcmgt+bit sequences and in the SVE predicate-merge picked the wrong
source on NaN/tie. Swap the compare operands and flip bit<->bif / add
a predicate not to match x86 second source wins behaviour.

2026-04-29 02:00:58 +00:00

..

ALUOps.cpp

FEXCore: Fix wrong shift value to extract NZCV in CmpPairZ

2026-04-25 00:41:24 -07:00

Arm64Relocations.cpp

FEXCore: Disable 48-bit VA optimization

2026-02-02 15:17:28 -08:00

AtomicOps.cpp

Core: Fix offsetof with runtime array indexes

2026-03-16 19:15:05 +01:00

BranchOps.cpp

JIT: Use struct for Spill/Fill default arguments

2026-03-12 19:25:12 -07:00

ConversionOps.cpp

IR: Convert rounding modes to enum class

2025-10-01 23:37:57 -04:00

DebugData.h

CodeCache: Introduce revamped interfaces

2025-09-11 17:03:50 +02:00

EncryptionOps.cpp

FEXCore: Switch constant emission to default to NoPad

2025-12-29 11:45:51 -08:00

JIT.cpp

IR: Adds support for printing strings

2026-03-28 17:53:33 -07:00

JITClass.h

JIT: Move ApplyRelocations to CodeCache

2025-12-02 18:38:59 +01:00

MemoryOps.cpp

MemoryOps: Collapse duplicate add/sub in Memset

2026-03-19 21:34:03 -04:00

MiscOps.cpp

IR: Adds support for printing strings

2026-03-28 17:53:33 -07:00

MoveOps.cpp

IR: Remove Swap1/Swap2 ops

2025-10-05 13:26:51 -04:00

Relocations.h

CodeCache: Implement cache loading

2025-12-15 16:12:43 +01:00

VectorOps.cpp

VectorOps: Fix MAXPS/MAXPD NaN and signed-zero tie selection

2026-04-29 02:00:58 +00:00