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Ryan Houdek
0c7c7ba670
Most of these were relying on the upper 16bits of the 80bit MM registers to be zero. This isn't necessarily true as one will find out when running this under the host runner.
27 lines
375 B
NASM
27 lines
375 B
NASM
%ifdef CONFIG
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{
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"RegData": {
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"MM0": "0x4142434445464748",
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"MM1": "0x4142434445464748"
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},
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"MemoryRegions": {
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"0x100000000": "4096"
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}
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}
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%endif
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mov rdx, 0xe0000000
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mov rax, 0x4142434445464748
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mov [rdx + 8 * 0], rax
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mov rax, 0x0
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mov [rdx + 8 * 1], rax
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movq mm0, [rdx + 8 * 0]
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movq mm1, [rdx + 8 * 1]
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movntq [rdx + 8 * 1], mm0
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movq mm1, [rdx + 8 * 1]
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hlt
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