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Ryan Houdek
0c7c7ba670
Most of these were relying on the upper 16bits of the 80bit MM registers to be zero. This isn't necessarily true as one will find out when running this under the host runner.
34 lines
479 B
NASM
34 lines
479 B
NASM
%ifdef CONFIG
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{
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"RegData": {
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"MM0": "0x0",
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"MM1": "0x0",
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"MM2": "0x1010101010101010"
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},
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"MemoryRegions": {
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"0x100000000": "4096"
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}
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}
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%endif
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mov rdx, 0xe0000000
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mov rax, 0xFFFFFFFFFFFFFFFF
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mov [rdx + 8 * 0], rax
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mov rax, 0x0
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mov [rdx + 8 * 1], rax
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mov rax, 0x1010101010101010
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mov [rdx + 8 * 2], rax
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mov rax, 0xFFFFFFFFFFFFFFFF
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mov [rdx + 8 * 3], rax
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movq mm0, [rdx]
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pandn mm0, [rdx + 8 * 2]
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movq mm1, [rdx]
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movq mm2, [rdx + 8 * 2]
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pandn mm1, mm2
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hlt
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