mirror of
https://github.com/FEX-Emu/FEX.git
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Alyssa Rosenzweig
40beef061f
now obsolete! Results for the whole series are excellent: Difference at 95.0% confidence -3.97603% +/- 0.254656% Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
102 lines
2.9 KiB
C++
102 lines
2.9 KiB
C++
// SPDX-License-Identifier: MIT
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/*
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$info$
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meta: ir|opts ~ IR to IR Optimization
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tags: ir|opts
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desc: Defines which passes are run, and runs them
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$end_info$
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*/
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#include "Interface/Context/Context.h"
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#include "Interface/IR/PassManager.h"
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#include "Interface/IR/Passes.h"
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#include "Interface/IR/Passes/RegisterAllocationPass.h"
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#include <FEXCore/Config/Config.h>
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#include <FEXCore/Utils/Profiler.h>
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namespace FEXCore::IR {
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class IREmitter;
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void PassManager::Finalize() {
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if (!PassManagerDumpIR()) {
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// Not configured to dump any IR, just return.
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return;
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}
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auto it = Passes.begin();
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// Walk the passes and add them where asked.
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if (PassManagerDumpIR() & FEXCore::Config::PassManagerDumpIR::BEFOREOPT) {
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// Insert at the start.
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it = InsertAt(it, Debug::CreateIRDumper());
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++it; // Skip what we inserted.
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}
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if ((PassManagerDumpIR() & FEXCore::Config::PassManagerDumpIR::BEFOREPASS) ||
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(PassManagerDumpIR() & FEXCore::Config::PassManagerDumpIR::AFTERPASS)) {
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bool SkipFirstBefore = PassManagerDumpIR() & FEXCore::Config::PassManagerDumpIR::BEFOREOPT;
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for (; it != Passes.end();) {
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if (PassManagerDumpIR() & FEXCore::Config::PassManagerDumpIR::BEFOREPASS) {
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if (SkipFirstBefore) {
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// If we need to skip the first one, then continue.
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SkipFirstBefore = false;
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++it;
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continue;
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}
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// Insert before
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it = InsertAt(it, Debug::CreateIRDumper());
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++it; // Skip what we inserted.
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}
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++it; // Skip current pass.
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if (PassManagerDumpIR() & FEXCore::Config::PassManagerDumpIR::AFTERPASS) {
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// Insert after
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it = InsertAt(it, Debug::CreateIRDumper());
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++it; // Skip what we inserted.
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}
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}
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}
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if (PassManagerDumpIR() & FEXCore::Config::PassManagerDumpIR::AFTEROPT) {
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if (!(PassManagerDumpIR() & FEXCore::Config::PassManagerDumpIR::AFTERPASS)) {
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// Insert final IRDumper.
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InsertAt(Passes.end(), Debug::CreateIRDumper());
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}
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}
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}
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void PassManager::AddDefaultPasses(FEXCore::Context::ContextImpl* ctx) {
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FEX_CONFIG_OPT(DisablePasses, O0);
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if (!DisablePasses()) {
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InsertPass(CreateX87StackOptimizationPass(ctx->HostFeatures, ctx->Config.Is64BitMode ? IR::OpSize::i64Bit : IR::OpSize::i32Bit));
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InsertPass(CreateDeadFlagCalculationEliminination());
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}
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}
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void PassManager::AddDefaultValidationPasses() {
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#if defined(ASSERTIONS_ENABLED) && ASSERTIONS_ENABLED
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InsertValidationPass(Validation::CreateIRValidation(), "IRValidation");
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#endif
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}
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void PassManager::InsertRegisterAllocationPass(FEXCore::Context::ContextImpl* ctx) {
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InsertPass(IR::CreateRegisterAllocationPass(&ctx->CPUID), "RA");
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}
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void PassManager::Run(IREmitter* IREmit) {
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FEXCORE_PROFILE_SCOPED("PassManager::Run");
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for (const auto& Pass : Passes) {
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Pass->Run(IREmit);
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}
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#if defined(ASSERTIONS_ENABLED) && ASSERTIONS_ENABLED
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for (const auto& Pass : ValidationPasses) {
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Pass->Run(IREmit);
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}
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#endif
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}
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} // namespace FEXCore::IR
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