Alyssa Rosenzweig c0a6d82025 OpcodeDispatcher: Use rmif for NZCV inserts ...

Optimizes piles of s/w flag generation on flagm.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

2023-11-09 09:40:51 -04:00

..

Config

FEXCore: Moves StringUtils to FEXCore headers

2023-11-02 20:09:12 -07:00

Context

GDBServer: Preparation work to get this moved to the frontend

2023-11-02 20:11:01 -07:00

Core

OpcodeDispatcher: Use rmif for NZCV inserts

2023-11-09 09:40:51 -04:00

GDBJIT

FEXCore/Interface/GDBJIT: Adds SPDX identifier

2023-09-19 17:33:15 -07:00

HLE/Thunks

Thunks: Print error if guest-provided callbacks are called asynchronously from the host

2023-11-02 19:50:58 +01:00

IR

OpcodeDispatcher: Optimize popf

2023-11-09 09:40:51 -04:00