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Ryan Houdek
bf5719770e
This was a debug LoadConstant that would load the entry in to a temprary register to make it easier to see what RIP a block was in. This was implemented when FEX stopped storing the RIP in the CPU state for every block. This is now no longer necessary since FEX stores the in the tail data of the block. This was affecting instructioncountci when in a debug build.