Ryan Houdek 6646a5cc72 OpcodeDispatcher: Fixes SHLD by 16 behaviour ...

We were assuming that SHLD undefined behaviour matches SHL, but the
specification actually changes a `ge` comparison to `gt`, which means a
shift of 16 isn't UB!

Thanks to the impeccable @OFFTKP in #5842 for bringing this up as it took a bit
for me to figure out what was actually wrong here. I modified their
unittest to cover more just to ensure we don't break it.

2026-08-25 15:15:36 -07:00

..

AVX_128.cpp

AVX128: Optimize 256-bit vmovmaskpd as well

2026-07-17 13:15:47 -07:00

BaseTables.h

FEXCore: Revert literal optimization from #4884

2025-12-22 10:00:55 -08:00

Crypto.cpp

Crypto: Clarify zero vector size in SHA1RNDS4Op()

2026-07-12 18:49:27 -04:00

DDDTables.h

[SVE256] Handle SSE insertions for Float->Int/Int->Float conversions

2026-06-17 04:44:39 -04:00

Flags.cpp

OpcodeDispatcher: Fixes SHLD by 16 behaviour

2026-08-25 15:15:36 -07:00

H0F3ATables.h

[SVE256] Ensure insertion behavior for AES operations on SSE

2026-07-03 19:35:31 -04:00

H0F38Tables.h

[SVE256] Ensure insertion behavior for AES operations on SSE

2026-07-03 19:35:31 -04:00

PrimaryGroupTables.h

OpcodeDispatcher: Implement support for CALLF/RETF

2025-08-13 16:18:12 -07:00

SecondaryGroupTables.h

OpcodeDispatcher: Make use of Bind consistently

2026-06-16 15:07:59 -04:00

SecondaryModRMTables.h

X86Tables: Move Second ModRM table to be constexpr

2025-08-27 12:24:25 -07:00

SecondaryTables.h

Vector: Move MOVQ2DQ over to Bind

2026-06-19 17:45:41 -04:00

Vector.cpp

Vector: Indicate 128-bit zero vector in DefaultX87State()

2026-07-13 14:07:12 -04:00

VEXTables.h

FEXCore/OpcodeDispatcher: Removes tuple usage for Dispatch tables

2025-07-16 13:57:16 -07:00

X87.cpp

OpcodeDispatcher: Zero OF, SF and AF for FCOMI and FCOMIF64

2026-08-06 16:29:29 +02:00

X87F64.cpp

OpcodeDispatcher: Zero OF, SF and AF for FCOMI and FCOMIF64

2026-08-06 16:29:29 +02:00