mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-06 17:00:19 +02:00
452 lines
12 KiB
JSON
452 lines
12 KiB
JSON
{
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"Features": {
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"Bitness": 64,
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"EnabledHostFeatures": [],
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"DisabledHostFeatures": [
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"SVE128",
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"SVE256",
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"AFP",
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"FLAGM",
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"FLAGM2",
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"CRYPTO"
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],
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"Comment": [
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"Look at the official documentation for more information about this layout.",
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"imm of each string comparison operation changes behaviour of the operation.",
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"[1:0] - Source Data Format",
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" - 00b: Unsigned bytes",
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" - 01b: Unsigned words",
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" - 10b: Signed bytes",
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" - 11b: Signed words",
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"[3:2] - Aggregation Operation",
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" - 00b: Equal Any",
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" - 01b: Range",
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" - 10b: Equal Each",
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" - 11b: Equal Ordered",
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"[5:4] - Polarity",
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" - 00b: Positive Polarity (IntRes2 = IntRes1)",
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" - 01b: Negative Polarity (IntRes2 = -1 ^ IntRes1)",
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" - 10b: Positive Masked (IntRes2 = IntRes1)",
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" - 11b: Negative Masked (IntRes2[i] = ~IntRes1[i])",
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"[6] - Output selection",
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" - 0b: ECX = LSB",
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" - 1b: ECX = MSB",
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"[7] - Reserved"
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]
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},
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"Instructions": {
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"pcmpestrm xmm0, xmm1, 0_0_00_00_00b": {
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"ExpectedInstructionCount": 17,
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"Comment": [
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"Bit mask (8-bit)",
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"0x66 0x0f 0x3A 0x60"
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],
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"ExpectedArm64ASM": [
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"ldr x3, [x28, #2360]",
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"ldr x0, [x28, #2368]",
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"stp x0, x30, [sp, #-16]!",
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"mov x0, x4",
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"mov x1, x5",
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"mov w2, #0x0",
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"mov v0.16b, v16.16b",
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"mov v1.16b, v17.16b",
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"blr x3",
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"ldp xzr, x30, [sp], #16",
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"mov w20, w0",
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"uxth w0, w20",
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"fmov s16, w0",
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"mov w26, #0x1",
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"mov w27, #0x0",
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"eor w20, w20, #0x20000000",
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"msr nzcv, x20"
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]
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},
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"pcmpestrm xmm0, xmm1, 0_0_00_00_01b": {
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"ExpectedInstructionCount": 17,
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"Comment": [
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"Bit mask (16-bit)",
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"0x66 0x0f 0x3A 0x60"
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],
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"ExpectedArm64ASM": [
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"ldr x3, [x28, #2360]",
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"ldr x0, [x28, #2368]",
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"stp x0, x30, [sp, #-16]!",
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"mov x0, x4",
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"mov x1, x5",
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"mov w2, #0x1",
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"mov v0.16b, v16.16b",
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"mov v1.16b, v17.16b",
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"blr x3",
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"ldp xzr, x30, [sp], #16",
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"mov w20, w0",
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"uxth w0, w20",
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"fmov s16, w0",
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"mov w26, #0x1",
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"mov w27, #0x0",
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"eor w20, w20, #0x20000000",
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"msr nzcv, x20"
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]
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},
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"pcmpestrm xmm0, xmm1, 0_1_00_00_00b": {
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"ExpectedInstructionCount": 49,
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"Comment": [
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"Expanded mask (8-bit)",
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"0x66 0x0f 0x3A 0x60"
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],
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"ExpectedArm64ASM": [
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"ldr x3, [x28, #2360]",
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"ldr x0, [x28, #2368]",
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"stp x0, x30, [sp, #-16]!",
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"mov x0, x4",
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"mov x1, x5",
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"mov w2, #0x40",
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"mov v0.16b, v16.16b",
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"mov v1.16b, v17.16b",
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"blr x3",
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"ldp xzr, x30, [sp], #16",
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"mov w20, w0",
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"movi v2.2d, #0x0",
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"sbfx x21, x20, #0, #1",
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"mov v2.b[0], w21",
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"sbfx x21, x20, #1, #1",
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"mov v2.b[1], w21",
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"sbfx x21, x20, #2, #1",
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"mov v2.b[2], w21",
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"sbfx x21, x20, #3, #1",
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"mov v2.b[3], w21",
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"sbfx x21, x20, #4, #1",
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"mov v2.b[4], w21",
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"sbfx x21, x20, #5, #1",
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"mov v2.b[5], w21",
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"sbfx x21, x20, #6, #1",
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"mov v2.b[6], w21",
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"sbfx x21, x20, #7, #1",
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"mov v2.b[7], w21",
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"sbfx x21, x20, #8, #1",
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"mov v2.b[8], w21",
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"sbfx x21, x20, #9, #1",
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"mov v2.b[9], w21",
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"sbfx x21, x20, #10, #1",
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"mov v2.b[10], w21",
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"sbfx x21, x20, #11, #1",
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"mov v2.b[11], w21",
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"sbfx x21, x20, #12, #1",
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"mov v2.b[12], w21",
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"sbfx x21, x20, #13, #1",
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"mov v2.b[13], w21",
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"sbfx x21, x20, #14, #1",
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"mov v2.b[14], w21",
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"sbfx x21, x20, #15, #1",
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"mov v16.16b, v2.16b",
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"mov v16.b[15], w21",
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"mov w26, #0x1",
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"mov w27, #0x0",
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"eor w20, w20, #0x20000000",
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"msr nzcv, x20"
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]
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},
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"pcmpestrm xmm0, xmm1, 0_1_00_00_01b": {
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"ExpectedInstructionCount": 33,
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"Comment": [
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"Expanded mask (16-bit)",
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"0x66 0x0f 0x3A 0x60"
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],
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"ExpectedArm64ASM": [
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"ldr x3, [x28, #2360]",
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"ldr x0, [x28, #2368]",
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"stp x0, x30, [sp, #-16]!",
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"mov x0, x4",
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"mov x1, x5",
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"mov w2, #0x41",
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"mov v0.16b, v16.16b",
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"mov v1.16b, v17.16b",
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"blr x3",
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"ldp xzr, x30, [sp], #16",
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"mov w20, w0",
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"movi v2.2d, #0x0",
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"sbfx x21, x20, #0, #1",
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"mov v2.h[0], w21",
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"sbfx x21, x20, #1, #1",
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"mov v2.h[1], w21",
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"sbfx x21, x20, #2, #1",
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"mov v2.h[2], w21",
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"sbfx x21, x20, #3, #1",
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"mov v2.h[3], w21",
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"sbfx x21, x20, #4, #1",
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"mov v2.h[4], w21",
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"sbfx x21, x20, #5, #1",
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"mov v2.h[5], w21",
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"sbfx x21, x20, #6, #1",
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"mov v2.h[6], w21",
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"sbfx x21, x20, #7, #1",
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"mov v16.16b, v2.16b",
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"mov v16.h[7], w21",
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"mov w26, #0x1",
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"mov w27, #0x0",
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"eor w20, w20, #0x20000000",
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"msr nzcv, x20"
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]
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},
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"pcmpestri xmm0, xmm1, 0_0_00_00_00b": {
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"ExpectedInstructionCount": 21,
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"Comment": [
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"8-bit",
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"0x66 0x0f 0x3A 0x61"
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],
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"ExpectedArm64ASM": [
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"ldr x3, [x28, #2360]",
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"ldr x0, [x28, #2368]",
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"stp x0, x30, [sp, #-16]!",
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"mov x0, x4",
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"mov x1, x5",
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"mov w2, #0x0",
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"mov v0.16b, v16.16b",
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"mov v1.16b, v17.16b",
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"blr x3",
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"ldp xzr, x30, [sp], #16",
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"mov w20, w0",
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"mov w27, #0x0",
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"uxth w21, w20",
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"mov w22, #0x10",
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"rbit w0, w21",
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"clz w23, w0",
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"cmp x21, #0x0 (0)",
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"csel x7, x22, x23, eq",
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"mov w26, #0x1",
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"eor w20, w20, #0x20000000",
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"msr nzcv, x20"
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]
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},
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"pcmpestri xmm0, xmm1, 0_0_00_00_01b": {
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"ExpectedInstructionCount": 21,
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"Comment": [
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"16-bit",
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"0x66 0x0f 0x3A 0x61"
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],
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"ExpectedArm64ASM": [
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"ldr x3, [x28, #2360]",
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"ldr x0, [x28, #2368]",
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"stp x0, x30, [sp, #-16]!",
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"mov x0, x4",
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"mov x1, x5",
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"mov w2, #0x1",
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"mov v0.16b, v16.16b",
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"mov v1.16b, v17.16b",
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"blr x3",
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"ldp xzr, x30, [sp], #16",
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"mov w20, w0",
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"mov w27, #0x0",
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"uxth w21, w20",
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"mov w22, #0x8",
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"rbit w0, w21",
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"clz w23, w0",
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"cmp x21, #0x0 (0)",
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"csel x7, x22, x23, eq",
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"mov w26, #0x1",
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"eor w20, w20, #0x20000000",
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"msr nzcv, x20"
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]
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},
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"pcmpistrm xmm0, xmm1, 0_0_00_00_00b": {
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"ExpectedInstructionCount": 15,
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"Comment": [
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"Bit mask (8-bit)",
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"0x66 0x0f 0x3A 0x62"
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],
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"ExpectedArm64ASM": [
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"str x30, [sp, #-16]!",
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"mov v0.16b, v16.16b",
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"mov v1.16b, v17.16b",
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"mov w0, #0x0",
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"ldr x1, [x28, #2376]",
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"ldr x3, [x28, #2384]",
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"blr x1",
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"ldr x30, [sp], #16",
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"mov w20, w0",
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"uxth w0, w20",
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"fmov s16, w0",
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"mov w26, #0x1",
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"mov w27, #0x0",
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"eor w20, w20, #0x20000000",
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"msr nzcv, x20"
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]
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},
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"pcmpistrm xmm0, xmm1, 0_0_00_00_01b": {
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"ExpectedInstructionCount": 15,
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"Comment": [
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"Bit mask (16-bit)",
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"0x66 0x0f 0x3A 0x62"
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],
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"ExpectedArm64ASM": [
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"str x30, [sp, #-16]!",
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"mov v0.16b, v16.16b",
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"mov v1.16b, v17.16b",
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"mov w0, #0x1",
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"ldr x1, [x28, #2376]",
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"ldr x3, [x28, #2384]",
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"blr x1",
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"ldr x30, [sp], #16",
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"mov w20, w0",
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"uxth w0, w20",
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"fmov s16, w0",
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"mov w26, #0x1",
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"mov w27, #0x0",
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"eor w20, w20, #0x20000000",
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"msr nzcv, x20"
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]
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},
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"pcmpistrm xmm0, xmm1, 0_1_00_00_00b": {
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"ExpectedInstructionCount": 47,
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"Comment": [
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"Expanded mask (8-bit)",
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"0x66 0x0f 0x3A 0x62"
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],
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"ExpectedArm64ASM": [
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"str x30, [sp, #-16]!",
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"mov v0.16b, v16.16b",
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"mov v1.16b, v17.16b",
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"mov w0, #0x40",
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"ldr x1, [x28, #2376]",
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"ldr x3, [x28, #2384]",
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"blr x1",
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"ldr x30, [sp], #16",
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"mov w20, w0",
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"movi v2.2d, #0x0",
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"sbfx x21, x20, #0, #1",
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"mov v2.b[0], w21",
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"sbfx x21, x20, #1, #1",
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"mov v2.b[1], w21",
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"sbfx x21, x20, #2, #1",
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"mov v2.b[2], w21",
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"sbfx x21, x20, #3, #1",
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"mov v2.b[3], w21",
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"sbfx x21, x20, #4, #1",
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"mov v2.b[4], w21",
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"sbfx x21, x20, #5, #1",
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"mov v2.b[5], w21",
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"sbfx x21, x20, #6, #1",
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"mov v2.b[6], w21",
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"sbfx x21, x20, #7, #1",
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"mov v2.b[7], w21",
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"sbfx x21, x20, #8, #1",
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"mov v2.b[8], w21",
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"sbfx x21, x20, #9, #1",
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"mov v2.b[9], w21",
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"sbfx x21, x20, #10, #1",
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"mov v2.b[10], w21",
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"sbfx x21, x20, #11, #1",
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"mov v2.b[11], w21",
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"sbfx x21, x20, #12, #1",
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"mov v2.b[12], w21",
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"sbfx x21, x20, #13, #1",
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"mov v2.b[13], w21",
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"sbfx x21, x20, #14, #1",
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"mov v2.b[14], w21",
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"sbfx x21, x20, #15, #1",
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"mov v16.16b, v2.16b",
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"mov v16.b[15], w21",
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"mov w26, #0x1",
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"mov w27, #0x0",
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"eor w20, w20, #0x20000000",
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"msr nzcv, x20"
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]
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},
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"pcmpistrm xmm0, xmm1, 0_1_00_00_01b": {
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"ExpectedInstructionCount": 31,
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|
"Comment": [
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"Expanded mask (16-bit)",
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|
"0x66 0x0f 0x3A 0x62"
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|
],
|
|
"ExpectedArm64ASM": [
|
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"str x30, [sp, #-16]!",
|
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"mov v0.16b, v16.16b",
|
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"mov v1.16b, v17.16b",
|
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"mov w0, #0x41",
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"ldr x1, [x28, #2376]",
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"ldr x3, [x28, #2384]",
|
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"blr x1",
|
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"ldr x30, [sp], #16",
|
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"mov w20, w0",
|
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"movi v2.2d, #0x0",
|
|
"sbfx x21, x20, #0, #1",
|
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"mov v2.h[0], w21",
|
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"sbfx x21, x20, #1, #1",
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"mov v2.h[1], w21",
|
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"sbfx x21, x20, #2, #1",
|
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"mov v2.h[2], w21",
|
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"sbfx x21, x20, #3, #1",
|
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"mov v2.h[3], w21",
|
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"sbfx x21, x20, #4, #1",
|
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"mov v2.h[4], w21",
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"sbfx x21, x20, #5, #1",
|
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"mov v2.h[5], w21",
|
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"sbfx x21, x20, #6, #1",
|
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"mov v2.h[6], w21",
|
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"sbfx x21, x20, #7, #1",
|
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"mov v16.16b, v2.16b",
|
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"mov v16.h[7], w21",
|
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"mov w26, #0x1",
|
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"mov w27, #0x0",
|
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"eor w20, w20, #0x20000000",
|
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"msr nzcv, x20"
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|
]
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|
},
|
|
"pcmpistri xmm0, xmm1, 0_0_00_00_00b": {
|
|
"ExpectedInstructionCount": 19,
|
|
"Comment": [
|
|
"8-bit",
|
|
"0x66 0x0f 0x3A 0x63"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"str x30, [sp, #-16]!",
|
|
"mov v0.16b, v16.16b",
|
|
"mov v1.16b, v17.16b",
|
|
"mov w0, #0x0",
|
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"ldr x1, [x28, #2376]",
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|
"ldr x3, [x28, #2384]",
|
|
"blr x1",
|
|
"ldr x30, [sp], #16",
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"mov w20, w0",
|
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"mov w27, #0x0",
|
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"uxth w21, w20",
|
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"mov w22, #0x10",
|
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"rbit w0, w21",
|
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"clz w23, w0",
|
|
"cmp x21, #0x0 (0)",
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|
"csel x7, x22, x23, eq",
|
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"mov w26, #0x1",
|
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"eor w20, w20, #0x20000000",
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"msr nzcv, x20"
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]
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|
},
|
|
"pcmpistri xmm0, xmm1, 0_0_00_00_01b": {
|
|
"ExpectedInstructionCount": 19,
|
|
"Comment": [
|
|
"16-bit",
|
|
"0x66 0x0f 0x3A 0x63"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"str x30, [sp, #-16]!",
|
|
"mov v0.16b, v16.16b",
|
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"mov v1.16b, v17.16b",
|
|
"mov w0, #0x1",
|
|
"ldr x1, [x28, #2376]",
|
|
"ldr x3, [x28, #2384]",
|
|
"blr x1",
|
|
"ldr x30, [sp], #16",
|
|
"mov w20, w0",
|
|
"mov w27, #0x0",
|
|
"uxth w21, w20",
|
|
"mov w22, #0x8",
|
|
"rbit w0, w21",
|
|
"clz w23, w0",
|
|
"cmp x21, #0x0 (0)",
|
|
"csel x7, x22, x23, eq",
|
|
"mov w26, #0x1",
|
|
"eor w20, w20, #0x20000000",
|
|
"msr nzcv, x20"
|
|
]
|
|
}
|
|
}
|
|
}
|