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Test behaviour themselves not changed at all, just data moved or aligned. For tests that aren't explicitly testing out SMC behaviour, we were accidentally relying on some aggressive SMC tracking by mixing data and code in the same page. To fix this just align the test's data to the next page boundary which means FEX's SMC tracking won't get triggered since it is no longer living in the same page. This has been a thorn for a while, so just get rid of it. We obviously still have ASM tests that still exist that /do/ rely on SMC, and those are still expected to work.
88 lines
2.3 KiB
NASM
88 lines
2.3 KiB
NASM
%ifdef CONFIG
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{
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"RegData": {
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"RAX": "0x0000000000000004",
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"RBX": "0x0000000000000004",
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"RCX": "0x0000000000000006",
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"RDX": "0x0000000000000006",
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"XMM0": ["0x402f800000000000", "0x400c000000000000"],
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"XMM1": ["0x402f800000000000", "0x4035400000000000"],
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"XMM2": ["0x0000000045464748", "0"],
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"XMM3": ["0x4142434445464748", "0"],
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"XMM4": ["0x0000000041424344", "0"],
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"XMM5": ["0x0000000045464748", "0x5152535455565758"]
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},
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"Mode": "32BIT"
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}
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%endif
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; FEX-Emu had a bug where 32-bit applications that relied on VEX.W would incorrectly handle widening behaviour.
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; AVX instructions that use VEX.W wouldn't scale their element sizes correctly.
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; Checks all instructions (skipping a few duplicates in the same class) that react to VEX.W.
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vmovaps xmm0, [rel .data_xmm0]
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vmovaps xmm1, [rel .data_xmm1]
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vmovaps xmm2, [rel .data_xmm2]
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; Affects all scalar FMA.
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vfmadd132sd xmm0, xmm2, xmm1
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; Affects all packed FMA.
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vmovaps xmm1, [rel .data_xmm0]
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vmovaps xmm2, [rel .data_xmm1]
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vmovaps xmm3, [rel .data_xmm2]
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vfmadd132pd xmm1, xmm3, xmm2
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vmovaps xmm2, [rel .data_xmm0]
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; Affects vcvttsd2si as well.
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vcvtsd2si eax, xmm2
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; This actually works on 32-bit, behaves like a 32-bit operation. Don't question it.
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db 0xc4, 0xe1, 0xfb, 0x2d, 0xda; vcvtsd2si rbx, xmm2
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vmovaps xmm2, [rel .data_6]
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; Affects vcvttss2si as well.
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vcvtss2si ecx, xmm2
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; This actually works on 32-bit, behaves like a 32-bit operation. Don't question it.
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db 0xc4, 0xe1, 0xfa, 0x2d, 0xd2 ; vcvtss2si rdx, xmm2
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vmovaps xmm2, [rel .data_test]
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vmovd dword [rel .data_temp], xmm2
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vmovaps xmm2, [rel .data_temp]
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vmovaps xmm3, [rel .data_test]
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vmovq qword [rel .data_temp], xmm3
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vmovaps xmm3, [rel .data_temp]
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vpxor xmm7, xmm7, xmm7
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vmovaps [rel .data_temp], xmm7
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; vpextrq qword explicitly SIGILLs on 32-bit
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vmovaps xmm4, [rel .data_test]
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vpextrd dword [rel .data_temp], xmm4, 1
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vmovaps xmm4, [rel .data_temp]
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vmovaps [rel .data_temp], xmm7
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; vpinsrq qword explicitly SIGILLs on 32-bit
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vmovaps xmm5, [rel .data_test]
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vpinsrd xmm5, dword [rel .data_temp + 8], 1
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hlt
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align 4096
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.data_xmm0:
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dq 0x400c000000000000, 0x400c000000000000
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.data_xmm1:
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dq 0x400c000000000000, 0x4012000000000000
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.data_xmm2:
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dq 0x400c000000000000, 0x4016000000000000
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.data_test:
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dq 0x4142434445464748, 0x5152535455565758
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.data_6:
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dd 6.0, 6.0, 6.0, 6.0
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.data_temp:
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dq 0, 0
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