steam-frame/FEX-Emu--FEX
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b27bf4390149f4b778bcdaa748c4deae98804e39
FEX-Emu--FEX/FEXCore/Source/Interface
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Lioncache b27bf43901 OpcodeDispatcher: Remove redundant moves from rorx 
By allowing junk in the upper bits, we can avoid an unnecessary move,
since we'll be ignoring them in the following ROR instruction anyway.
2023-10-15 17:05:15 +02:00
..
Config
FEXCore: Implements support for RPRES
2023-10-07 23:13:47 -07:00
Context
InstCountCI: Support multiple instructions in the tests
2023-10-09 21:49:53 -07:00
Core
OpcodeDispatcher: Remove redundant moves from rorx
2023-10-15 17:05:15 +02:00
GDBJIT
FEXCore/Interface/GDBJIT: Adds SPDX identifier
2023-09-19 17:33:15 -07:00
HLE/Thunks
FEXCore/Interface/Thunks: Adds SPDX identifier
2023-09-19 17:33:14 -07:00
IR
IR: Adds scalar vector insert operations
2023-10-10 03:17:19 -07:00