mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-07 17:00:19 +02:00
Ryan Houdek
5759b0d503
Fixes #1217 Instead of throwing an error and closing down FEX. Instead pass the SIGILL to the guest application. On unhandled instruction implementation the instruction, we instead emit a _Break IR op at that location. A _Break IR op will ensure the context state is synchronized at the point of of the fault and has fairly low overhead. We branch to the dispatcher which does the SRA spilling. Tested this with an application that attempts an AVX512 instruction, catches the fault, and continues onward. With #1383 in place, we also won't pass spurious ERROR_AND_DIE to the guest anymore.
686 lines
21 KiB
C++
686 lines
21 KiB
C++
/*
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$info$
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meta: ir|parser ~ Text -> IR
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tags: ir|parser
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$end_info$
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*/
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#include <FEXCore/IR/IR.h>
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#include <FEXCore/IR/IntrusiveIRList.h>
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#include <FEXCore/IR/IREmitter.h>
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#include <FEXCore/Utils/LogManager.h>
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#include <algorithm>
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#include <array>
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#include <cstdint>
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#include <errno.h>
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#include <memory>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string>
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#include <string_view>
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#include <utility>
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#include <vector>
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#include <istream>
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#include <unordered_map>
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namespace FEXCore::IR {
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namespace {
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enum class DecodeFailure {
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DECODE_OKAY,
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DECODE_UNKNOWN_TYPE,
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DECODE_INVALID,
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DECODE_INVALIDCHAR,
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DECODE_INVALIDRANGE,
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DECODE_INVALIDREGISTERCLASS,
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DECODE_UNKNOWN_SSA,
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DECODE_INVALID_CONDFLAG,
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DECODE_INVALID_MEMOFFSETTYPE,
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DECODE_INVALID_FENCETYPE,
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DECODE_INVALID_BREAKTYPE,
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};
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std::string ltrim(std::string String) {
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size_t pos = std::string::npos;
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if ((pos = String.find_first_not_of(" \t\n\r")) != std::string::npos) {
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String.erase(0, pos);
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}
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return String;
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}
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std::string rtrim(std::string String) {
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size_t pos = std::string::npos;
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if ((pos = String.find_last_not_of(" \t\n\r")) != std::string::npos) {
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String.erase(String.begin() + pos + 1, String.end());
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}
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return String;
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}
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std::string trim(std::string String) {
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return rtrim(ltrim(String));
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}
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std::string DecodeErrorToString(DecodeFailure Failure) {
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switch (Failure) {
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case DecodeFailure::DECODE_OKAY: return "Okay";
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case DecodeFailure::DECODE_UNKNOWN_TYPE: return "Unknown Type";
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case DecodeFailure::DECODE_INVALID: return "Invalid";
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case DecodeFailure::DECODE_INVALIDCHAR: return "Invalid starting char";
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case DecodeFailure::DECODE_INVALIDRANGE: return "Invalid integer range";
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case DecodeFailure::DECODE_INVALIDREGISTERCLASS: return "Invalid register class";
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case DecodeFailure::DECODE_UNKNOWN_SSA: return "Unknown SSA value";
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case DecodeFailure::DECODE_INVALID_CONDFLAG: return "Invalid Conditional name";
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case DecodeFailure::DECODE_INVALID_MEMOFFSETTYPE: return "Invalid Memory Offset Type";
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case DecodeFailure::DECODE_INVALID_FENCETYPE: return "Invalid Fence Type";
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case DecodeFailure::DECODE_INVALID_BREAKTYPE: return "Invalid Break Reason Type";
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}
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return "Unknown Error";
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}
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class IRParser: public FEXCore::IR::IREmitter {
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public:
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template<typename Type>
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std::pair<DecodeFailure, Type> DecodeValue(const std::string &Arg) {
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return {DecodeFailure::DECODE_UNKNOWN_TYPE, {}};
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}
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template<>
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std::pair<DecodeFailure, uint8_t> DecodeValue(const std::string &Arg) {
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if (Arg.at(0) != '#') return {DecodeFailure::DECODE_INVALIDCHAR, 0};
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uint8_t Result = strtoul(&Arg.at(1), nullptr, 0);
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if (errno == ERANGE) return {DecodeFailure::DECODE_INVALIDRANGE, 0};
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return {DecodeFailure::DECODE_OKAY, Result};
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}
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template<>
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std::pair<DecodeFailure, bool> DecodeValue(const std::string &Arg) {
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if (Arg.at(0) != '#') return {DecodeFailure::DECODE_INVALIDCHAR, 0};
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uint8_t Result = strtoul(&Arg.at(1), nullptr, 0);
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if (errno == ERANGE || Result > 1) return {DecodeFailure::DECODE_INVALIDRANGE, 0};
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return {DecodeFailure::DECODE_OKAY, Result != 0};
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}
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template<>
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std::pair<DecodeFailure, uint16_t> DecodeValue(const std::string &Arg) {
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if (Arg.at(0) != '#') return {DecodeFailure::DECODE_INVALIDCHAR, 0};
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uint16_t Result = strtoul(&Arg.at(1), nullptr, 0);
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if (errno == ERANGE) return {DecodeFailure::DECODE_INVALIDRANGE, 0};
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return {DecodeFailure::DECODE_OKAY, Result};
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}
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template<>
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std::pair<DecodeFailure, uint32_t> DecodeValue(const std::string &Arg) {
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if (Arg.at(0) != '#') return {DecodeFailure::DECODE_INVALIDCHAR, 0};
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uint32_t Result = strtoul(&Arg.at(1), nullptr, 0);
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if (errno == ERANGE) return {DecodeFailure::DECODE_INVALIDRANGE, 0};
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return {DecodeFailure::DECODE_OKAY, Result};
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}
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template<>
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std::pair<DecodeFailure, uint64_t> DecodeValue(const std::string &Arg) {
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if (Arg.at(0) != '#') return {DecodeFailure::DECODE_INVALIDCHAR, 0};
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uint64_t Result = strtoull(&Arg.at(1), nullptr, 0);
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if (errno == ERANGE) return {DecodeFailure::DECODE_INVALIDRANGE, 0};
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return {DecodeFailure::DECODE_OKAY, Result};
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}
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template<>
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std::pair<DecodeFailure, int64_t> DecodeValue(const std::string &Arg) {
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if (Arg.at(0) != '#') return {DecodeFailure::DECODE_INVALIDCHAR, 0};
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int64_t Result = (int64_t)strtoull(&Arg.at(1), nullptr, 0);
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if (errno == ERANGE) return {DecodeFailure::DECODE_INVALIDRANGE, 0};
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return {DecodeFailure::DECODE_OKAY, Result};
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}
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template<>
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std::pair<DecodeFailure, IR::SHA256Sum> DecodeValue(const std::string &Arg) {
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IR::SHA256Sum Result;
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if (Arg.at(0) != 's' || Arg.at(1) != 'h' || Arg.at(2) != 'a' || Arg.at(3) != '2' || Arg.at(4) != '5' || Arg.at(5) != '6' || Arg.at(6) != ':')
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return {DecodeFailure::DECODE_INVALIDCHAR, Result};
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auto GetDigit = [](const std::string &Arg, int pos, uint8_t *val) {
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auto chr = Arg.at(pos);
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if (chr >= '0' && chr <= '9') {
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*val = chr - '0';
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return true;
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} else if (chr >= 'a' && chr <= 'f') {
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*val = 10 + chr - 'a';
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return true;
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} else {
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return false;
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}
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};
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for (size_t i = 0; i < sizeof(Result.data); i++) {
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uint8_t high, low;
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if (!GetDigit(Arg, 7 + 2 * i + 0, &high) || !GetDigit(Arg, 7 + 2 * i + 1, &low)) {
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return {DecodeFailure::DECODE_INVALIDRANGE, Result};
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}
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Result.data[i] = high * 16 + low;
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}
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return {DecodeFailure::DECODE_OKAY, Result};
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}
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template<>
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std::pair<DecodeFailure, FEXCore::IR::RegisterClassType> DecodeValue(const std::string &Arg) {
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if (Arg == "GPR") {
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return {DecodeFailure::DECODE_OKAY, FEXCore::IR::GPRClass};
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}
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else if (Arg == "FPR") {
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return {DecodeFailure::DECODE_OKAY, FEXCore::IR::FPRClass};
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}
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else if (Arg == "GPRPair") {
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return {DecodeFailure::DECODE_OKAY, FEXCore::IR::GPRPairClass};
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}
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else if (Arg == "Complex") {
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return {DecodeFailure::DECODE_OKAY, FEXCore::IR::ComplexClass};
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}
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return {DecodeFailure::DECODE_INVALIDREGISTERCLASS, FEXCore::IR::InvalidClass};
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}
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template<>
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std::pair<DecodeFailure, FEXCore::IR::TypeDefinition> DecodeValue(const std::string &Arg) {
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uint8_t Size{}, Elements{1};
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int NumArgs = sscanf(Arg.c_str(), "i%hhdv%hhd", &Size, &Elements);
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if (NumArgs != 1 && NumArgs != 2) {
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return {DecodeFailure::DECODE_INVALID, {}};
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}
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return {DecodeFailure::DECODE_OKAY, FEXCore::IR::TypeDefinition::Create(Size / 8, Elements)};
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}
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template<>
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std::pair<DecodeFailure, FEXCore::IR::CondClassType> DecodeValue(const std::string &Arg) {
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static constexpr std::array<std::string_view, 22> CondNames = {
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"EQ",
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"NEQ",
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"UGE",
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"ULT",
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"MI",
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"PL",
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"VS",
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"VC",
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"UGT",
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"ULE",
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"SGE",
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"SLT",
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"SGT",
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"SLE",
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"Invalid Cond",
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"Invalid Cond",
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"FLU",
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"FGE",
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"FLEU",
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"FGT",
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"FU",
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"FNU"
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};
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for (size_t i = 0; i < CondNames.size(); ++i) {
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if (CondNames[i] == Arg) {
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return {DecodeFailure::DECODE_OKAY, CondClassType{static_cast<uint8_t>(i)}};
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}
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}
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return {DecodeFailure::DECODE_INVALID_CONDFLAG, {}};
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}
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template<>
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std::pair<DecodeFailure, FEXCore::IR::MemOffsetType> DecodeValue(const std::string &Arg) {
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static constexpr std::array<std::string_view, 3> Names = {
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"SXTX",
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"UXTW",
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"SXTW",
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};
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for (size_t i = 0; i < Names.size(); ++i) {
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if (Names[i] == Arg) {
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return {DecodeFailure::DECODE_OKAY, MemOffsetType{static_cast<uint8_t>(i)}};
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}
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}
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return {DecodeFailure::DECODE_INVALID_MEMOFFSETTYPE, {}};
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}
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template<>
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std::pair<DecodeFailure, FEXCore::IR::FenceType> DecodeValue(const std::string &Arg) {
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static constexpr std::array<std::string_view, 3> Names = {
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"Loads",
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"Stores",
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"LoadStores",
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};
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for (size_t i = 0; i < Names.size(); ++i) {
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if (Names[i] == Arg) {
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return {DecodeFailure::DECODE_OKAY, FenceType{static_cast<uint8_t>(i)}};
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}
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}
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return {DecodeFailure::DECODE_INVALID_FENCETYPE, {}};
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}
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template<>
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std::pair<DecodeFailure, FEXCore::IR::BreakReason> DecodeValue(const std::string &Arg) {
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static constexpr std::array<std::string_view, 6> Names = {
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"Unimplemented",
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"Interrupt",
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"Interrupt3",
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"Halt",
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"Overfloat",
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"InvalidInstruction",
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};
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for (size_t i = 0; i < Names.size(); ++i) {
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if (Names[i] == Arg) {
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return {DecodeFailure::DECODE_OKAY, BreakReason{static_cast<uint8_t>(i)}};
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}
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}
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return {DecodeFailure::DECODE_INVALID_BREAKTYPE, {}};
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}
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template<>
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std::pair<DecodeFailure, OrderedNode*> DecodeValue(const std::string &Arg) {
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if (Arg.at(0) != '%') return {DecodeFailure::DECODE_INVALIDCHAR, 0};
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// Strip off the type qualifier from the ssa value
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std::string SSAName = trim(Arg);
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const size_t ArgEnd = SSAName.find_first_of(' ');
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if (ArgEnd != std::string::npos) {
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SSAName = SSAName.substr(0, ArgEnd);
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}
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// Forward declarations may make this not succed
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auto Op = SSANameMapper.find(SSAName);
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if (Op == SSANameMapper.end()) {
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return {DecodeFailure::DECODE_UNKNOWN_SSA, nullptr};
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}
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return {DecodeFailure::DECODE_OKAY, Op->second};
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}
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struct LineDefinition {
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size_t LineNumber;
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bool HasDefinition{};
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std::string Definition{};
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FEXCore::IR::TypeDefinition Size{};
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std::string IROp{};
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FEXCore::IR::IROps OpEnum;
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bool HasArgs{};
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std::vector<std::string> Args;
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OrderedNode *Node{};
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};
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std::vector<std::string> Lines;
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std::unordered_map<std::string, OrderedNode*> SSANameMapper;
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std::vector<LineDefinition> Defs;
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LineDefinition *CurrentDef{};
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std::unordered_map<std::string_view, FEXCore::IR::IROps> NameToOpMap;
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IRParser(std::istream *text) {
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InitializeNameMap();
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std::string TmpLine;
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while (!text->eof()) {
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std::getline(*text, TmpLine);
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if (text->eof()) {
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break;
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}
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if (text->fail()) {
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LogMan::Msg::EFmt("Failed to getline on line: {}", Lines.size());
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return;
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}
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Lines.emplace_back(TmpLine);
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}
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ResetWorkingList();
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Loaded = Parse();
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}
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bool Loaded = false;
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#define IROP_PARSER_ALLOCATE_HELPERS
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#include <FEXCore/IR/IRDefines.inc>
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bool Parse() {
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const auto CheckPrintError = [&](const LineDefinition &Def, DecodeFailure Failure) -> bool {
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if (Failure != DecodeFailure::DECODE_OKAY) {
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LogMan::Msg::EFmt("Error on Line: {}", Def.LineNumber);
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LogMan::Msg::EFmt("{}", Lines[Def.LineNumber]);
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LogMan::Msg::EFmt("Value Couldn't be decoded due to {}", DecodeErrorToString(Failure));
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return false;
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}
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return true;
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};
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// String parse every line for our definitions
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for (size_t i = 0; i < Lines.size(); ++i) {
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std::string Line = Lines[i];
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LineDefinition Def{};
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CurrentDef = &Def;
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Def.LineNumber = i;
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Line = trim(Line);
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// Skip empty lines
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if (Line.empty()) {
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continue;
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}
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if (Line[0] == ';') {
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// This is a comment line
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// Skip it
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continue;
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}
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size_t CurrentPos{};
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// Let's see if this node is assigning something first
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if (Line[0] == '%') {
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size_t DefinitionEnd = std::string::npos;
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if ((DefinitionEnd = Line.find_first_of('=', CurrentPos)) != std::string::npos) {
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Def.Definition = Line.substr(0, DefinitionEnd);
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Def.Definition = trim(Def.Definition);
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Def.HasDefinition = true;
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CurrentPos = DefinitionEnd + 1; // +1 to ensure we go past then assignment
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}
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else {
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LogMan::Msg::EFmt("Error on Line: {}", i);
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LogMan::Msg::EFmt("{}", Lines[i]);
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LogMan::Msg::EFmt("SSA declaration without assignment");
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return false;
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}
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}
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// Check if we are pulling in some IR from the IR Printer
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// Prints (%ssa%d) at the start of lines without a definition
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if (Line[0] == '(') {
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size_t DefinitionEnd = std::string::npos;
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if ((DefinitionEnd = Line.find_first_of(')', CurrentPos)) != std::string::npos) {
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size_t SSAEnd = std::string::npos;
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if ((SSAEnd = Line.find_last_of(' ', DefinitionEnd)) != std::string::npos) {
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std::string Type = Line.substr(SSAEnd + 1, DefinitionEnd - SSAEnd - 1);
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Type = trim(Type);
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auto DefinitionSize = DecodeValue<FEXCore::IR::TypeDefinition>(Type);
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if (!CheckPrintError(Def, DefinitionSize.first)) {
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return false;
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}
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Def.Size = DefinitionSize.second;
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}
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Def.Definition = trim(Line.substr(1, std::min(DefinitionEnd, SSAEnd) - 1));
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CurrentPos = DefinitionEnd + 1;
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}
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else {
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LogMan::Msg::EFmt("Error on Line: {}", i);
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LogMan::Msg::EFmt("{}", Lines[i]);
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LogMan::Msg::EFmt("SSA value with numbered SSA provided but no closing parentheses");
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return false;
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}
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}
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if (Def.HasDefinition) {
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// Let's check if we have a size declared with this variable
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size_t NameEnd = std::string::npos;
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if ((NameEnd = Def.Definition.find_first_of(' ')) != std::string::npos) {
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std::string Type = Def.Definition.substr(NameEnd + 1);
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Type = trim(Type);
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Def.Definition = trim(Def.Definition.substr(0, NameEnd));
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auto DefinitionSize = DecodeValue<FEXCore::IR::TypeDefinition>(Type);
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if (!CheckPrintError(Def, DefinitionSize.first)) return false;
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Def.Size = DefinitionSize.second;
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}
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if (Def.Definition == "%Invalid") {
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LogMan::Msg::EFmt("Error on Line: {}", i);
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LogMan::Msg::EFmt("{}", Lines[i]);
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LogMan::Msg::EFmt("Definition tried to define reserved %Invalid ssa node");
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return false;
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}
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}
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// Let's get the IR op
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size_t OpNameEnd = std::string::npos;
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std::string RemainingLine = trim(Line.substr(CurrentPos));
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CurrentPos = 0;
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if ((OpNameEnd = RemainingLine.find_first_of(" \t\n\r\0", CurrentPos)) != std::string::npos) {
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Def.IROp = RemainingLine.substr(CurrentPos, OpNameEnd);
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Def.IROp = trim(Def.IROp);
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Def.HasArgs = true;
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CurrentPos = OpNameEnd;
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}
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else {
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if (RemainingLine.empty()) {
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LogMan::Msg::EFmt("Error on Line: {}", i);
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LogMan::Msg::EFmt("{}", Lines[i]);
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LogMan::Msg::EFmt("Line without an IROp?");
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return false;
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}
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Def.IROp = RemainingLine;
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Def.HasArgs = false;
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}
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if (Def.HasArgs) {
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RemainingLine = trim(RemainingLine.substr(CurrentPos));
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CurrentPos = 0;
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if (RemainingLine.empty()) {
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// How did we get here?
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Def.HasArgs = false;
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}
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|
else {
|
|
while (!RemainingLine.empty()) {
|
|
const size_t ArgEnd = RemainingLine.find(',');
|
|
std::string Arg = trim(RemainingLine.substr(0, ArgEnd));
|
|
|
|
Def.Args.emplace_back(std::move(Arg));
|
|
|
|
RemainingLine.erase(0, ArgEnd+1); // +1 to ensure we go past the ','
|
|
if (ArgEnd == std::string::npos)
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
CurrentDef = &Defs.emplace_back(std::move(Def));
|
|
}
|
|
|
|
// Ensure all of the ops are real ops
|
|
for(size_t i = 0; i < Defs.size(); ++i) {
|
|
auto &Def = Defs[i];
|
|
auto Op = NameToOpMap.find(Def.IROp);
|
|
if (Op == NameToOpMap.end()) {
|
|
LogMan::Msg::EFmt("Error on Line: {}", Def.LineNumber);
|
|
LogMan::Msg::EFmt("{}", Lines[Def.LineNumber]);
|
|
LogMan::Msg::EFmt("IROp '{}' doesn't exist", Def.IROp);
|
|
return false;
|
|
}
|
|
Def.OpEnum = Op->second;
|
|
}
|
|
|
|
// Emit the header op
|
|
IRPair<IROp_IRHeader> IRHeader;
|
|
{
|
|
auto &Def = Defs[0];
|
|
CurrentDef = &Def;
|
|
if (Def.OpEnum != FEXCore::IR::IROps::OP_IRHEADER) {
|
|
LogMan::Msg::EFmt("Error on Line: {}", Def.LineNumber);
|
|
LogMan::Msg::EFmt("{}", Lines[Def.LineNumber]);
|
|
LogMan::Msg::EFmt("First op needs to be IRHeader. Was '{}'", Def.IROp);
|
|
return false;
|
|
}
|
|
|
|
auto CodeBlockCount = DecodeValue<uint64_t>(Def.Args[1]);
|
|
|
|
if (!CheckPrintError(Def, CodeBlockCount.first)) return false;
|
|
|
|
IRHeader = _IRHeader(InvalidNode, CodeBlockCount.second);
|
|
}
|
|
|
|
SetWriteCursor(nullptr); // isolate the header from everything following
|
|
|
|
// Initialize SSANameMapper with Invalid value
|
|
SSANameMapper.insert_or_assign("%Invalid", Invalid());
|
|
|
|
// Spin through the blocks and generate basic block ops
|
|
for(size_t i = 0; i < Defs.size(); ++i) {
|
|
auto &Def = Defs[i];
|
|
if (Def.OpEnum == FEXCore::IR::IROps::OP_CODEBLOCK) {
|
|
auto CodeBlock = _CodeBlock(InvalidNode, InvalidNode);
|
|
SSANameMapper.insert_or_assign(Def.Definition, CodeBlock.Node);
|
|
Def.Node = CodeBlock.Node;
|
|
|
|
if (i == 1) {
|
|
// First code block is the entry block
|
|
// Link the header to the first block
|
|
IRHeader.first->Blocks = CodeBlock.Node->Wrapped(DualListData.ListBegin());
|
|
}
|
|
CodeBlocks.emplace_back(CodeBlock.Node);
|
|
}
|
|
}
|
|
SetWriteCursor(nullptr); // isolate the block headers too
|
|
|
|
// Spin through all the definitions and add the ops to the basic blocks
|
|
OrderedNode *CurrentBlock{};
|
|
FEXCore::IR::IROp_CodeBlock *CurrentBlockOp{};
|
|
for(size_t i = 1; i < Defs.size(); ++i) {
|
|
auto &Def = Defs[i];
|
|
CurrentDef = &Def;
|
|
|
|
switch (Def.OpEnum) {
|
|
// Special handled
|
|
case FEXCore::IR::IROps::OP_IRHEADER:
|
|
LogMan::Msg::EFmt("Error on Line: {}", Def.LineNumber);
|
|
LogMan::Msg::EFmt("{}", Lines[Def.LineNumber]);
|
|
LogMan::Msg::EFmt("IRHEADER used in the middle of the block!");
|
|
return false; // only one OP_IRHEADER allowed per block
|
|
|
|
case FEXCore::IR::IROps::OP_CODEBLOCK: {
|
|
SetWriteCursor(nullptr); // isolate from previous block
|
|
if (CurrentBlock != nullptr) {
|
|
LogMan::Msg::EFmt("Error on Line: {}", Def.LineNumber);
|
|
LogMan::Msg::EFmt("{}", Lines[Def.LineNumber]);
|
|
LogMan::Msg::EFmt("CodeBlock being used inside of already existing codeblock!");
|
|
return false;
|
|
}
|
|
|
|
CurrentBlock = Def.Node;
|
|
CurrentBlockOp = CurrentBlock->Op(DualListData.DataBegin())->CW<FEXCore::IR::IROp_CodeBlock>();
|
|
break;
|
|
}
|
|
|
|
|
|
case FEXCore::IR::IROps::OP_BEGINBLOCK: {
|
|
if (CurrentBlock == nullptr) {
|
|
LogMan::Msg::EFmt("Error on Line: {}", Def.LineNumber);
|
|
LogMan::Msg::EFmt("{}", Lines[Def.LineNumber]);
|
|
LogMan::Msg::EFmt("EndBlock being used outside of a block!");
|
|
return false;
|
|
}
|
|
|
|
auto Adjust = DecodeValue<OrderedNode*>(Def.Args[0]);
|
|
if (!CheckPrintError(Def, Adjust.first)) {
|
|
return false;
|
|
}
|
|
|
|
Def.Node = _BeginBlock(Adjust.second);
|
|
CurrentBlockOp->Begin = Def.Node->Wrapped(DualListData.ListBegin());
|
|
break;
|
|
}
|
|
|
|
case FEXCore::IR::IROps::OP_ENDBLOCK: {
|
|
if (CurrentBlock == nullptr) {
|
|
LogMan::Msg::EFmt("Error on Line: {}", Def.LineNumber);
|
|
LogMan::Msg::EFmt("{}", Lines[Def.LineNumber]);
|
|
LogMan::Msg::EFmt("EndBlock being used outside of a block!");
|
|
return false;
|
|
}
|
|
|
|
auto Adjust = DecodeValue<OrderedNode*>(Def.Args[0]);
|
|
if (!CheckPrintError(Def, Adjust.first)) {
|
|
return false;
|
|
}
|
|
|
|
Def.Node = _EndBlock(Adjust.second);
|
|
CurrentBlockOp->Last = Def.Node->Wrapped(DualListData.ListBegin());
|
|
|
|
CurrentBlock = nullptr;
|
|
CurrentBlockOp = nullptr;
|
|
|
|
break;
|
|
}
|
|
|
|
case FEXCore::IR::IROps::OP_DUMMY: {
|
|
LogMan::Msg::EFmt("Error on Line: {}", Def.LineNumber);
|
|
LogMan::Msg::EFmt("{}", Lines[Def.LineNumber]);
|
|
LogMan::Msg::EFmt("Dummy op must not be used");
|
|
break;
|
|
}
|
|
#define IROP_PARSER_SWITCH_HELPERS
|
|
#include <FEXCore/IR/IRDefines.inc>
|
|
default: {
|
|
LogMan::Msg::EFmt("Error on Line: {}", Def.LineNumber);
|
|
LogMan::Msg::EFmt("{}", Lines[Def.LineNumber]);
|
|
LogMan::Msg::EFmt("Unhandled Op enum '{}' in parser", Def.IROp);
|
|
return false;
|
|
}
|
|
}
|
|
|
|
if (Def.HasDefinition) {
|
|
auto IROp = Def.Node->Op(DualListData.DataBegin());
|
|
if (Def.Size.Elements()) {
|
|
IROp->Size = Def.Size.Bytes() * Def.Size.Elements();
|
|
IROp->ElementSize = Def.Size.Bytes();
|
|
}
|
|
else {
|
|
IROp->Size = Def.Size.Bytes();
|
|
IROp->ElementSize = 0;
|
|
}
|
|
SSANameMapper.insert_or_assign(Def.Definition, Def.Node);
|
|
}
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
void InitializeNameMap() {
|
|
if (NameToOpMap.empty()) {
|
|
for (FEXCore::IR::IROps Op = FEXCore::IR::IROps::OP_DUMMY;
|
|
Op <= FEXCore::IR::IROps::OP_LAST;
|
|
Op = static_cast<FEXCore::IR::IROps>(static_cast<uint32_t>(Op) + 1)) {
|
|
NameToOpMap.insert_or_assign(FEXCore::IR::GetName(Op), Op);
|
|
}
|
|
}
|
|
}
|
|
};
|
|
|
|
} // anon namespace
|
|
|
|
std::unique_ptr<IREmitter> Parse(std::istream *in) {
|
|
auto parser = std::make_unique<IRParser>(in);
|
|
|
|
if (parser->Loaded) {
|
|
return parser;
|
|
} else {
|
|
return nullptr;
|
|
}
|
|
}
|
|
|
|
}
|