Lioncache 23b9d8e108 ARMEmitter: Add check for registers being consecutive in constructive SPLICE ...

Will catch cases where registers aren't consecutive in the constructive
variant. While we're at it, we can also amend EXT's similar but slightly wrong
consecutive check.

Also adds tests to ensure these corner-cases hold.

2023-02-22 11:59:58 -05:00

..

Config

Merge pull request #2400 from Sonicadvance1/rip_reconstruct

2023-02-22 09:48:02 -05:00

Context

Merge pull request #2400 from Sonicadvance1/rip_reconstruct

2023-02-22 09:48:02 -05:00

Core

ARMEmitter: Add check for registers being consecutive in constructive SPLICE

2023-02-22 11:59:58 -05:00

GDBJIT

GDBSymbols: Cleanups

2022-06-27 14:44:07 +03:00

HLE/Thunks

FEXCore: Removes C wrapper interface

2023-02-19 11:59:11 -08:00

IR

OpcodeDispatcher: Add VTrn/VTrn2 IR opcodes

2023-02-20 16:44:14 -05:00