mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-06 08:00:15 +02:00
435 lines
10 KiB
JSON
435 lines
10 KiB
JSON
{
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"Features": {
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"Bitness": 64,
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"EnabledHostFeatures": [],
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"DisabledHostFeatures": [
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"AFP",
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"SVE256",
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"SVE128"
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],
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"BinaryCacheVersion": 13
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},
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"Instructions": {
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"vfmaddsubps xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x5c 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmaddsubps ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x5c 256-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmaddsubpd xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x5d 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmaddsubpd ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x5d 256-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmsubaddps xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x5e 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmsubaddps ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x5e 256-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmsubaddpd xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x5f 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmsubaddpd ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x5f 256-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmaddps xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x68 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmaddps ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x68 256-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmaddpd xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x69 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmaddpd ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x69 256-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmaddss xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x6a 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmaddsd xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x6b 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmsubps xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x6c 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmsubps ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x6c 256-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmsubpd xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x6d 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmsubpd ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x6d 256-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmsubss xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x6e 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfmsubsd xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x6f 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfnmaddps xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x78 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfnmaddpd ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x78 256-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfnmaddss xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x79 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfnmaddsd xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x7a 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfnmsubps xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x7c 128-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfnmsubps ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x7c 256-bit"
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],
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"ExpectedArm64ASM": [
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"mov w20, #0x10000",
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"str x20, [x28, #24]",
|
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"mov w0, #0x401",
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfnmsubpd xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 6,
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"Comment": [
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"Map 3 0b01 0x7d 128-bit"
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],
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|
"ExpectedArm64ASM": [
|
|
"mov w20, #0x10000",
|
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"str x20, [x28, #24]",
|
|
"mov w0, #0x401",
|
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"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
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"br x0"
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]
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},
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"vfnmsubpd ymm0, ymm1, ymm2, ymm3": {
|
|
"ExpectedInstructionCount": 6,
|
|
"Comment": [
|
|
"Map 3 0b01 0x7d 256-bit"
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|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov w20, #0x10000",
|
|
"str x20, [x28, #24]",
|
|
"mov w0, #0x401",
|
|
"str x0, [x28, #1496]",
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"ldr x0, [x28, #2968]",
|
|
"br x0"
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]
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},
|
|
"vfnmsubss xmm0, xmm1, xmm2, xmm3": {
|
|
"ExpectedInstructionCount": 6,
|
|
"Comment": [
|
|
"Map 3 0b01 0x7e 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov w20, #0x10000",
|
|
"str x20, [x28, #24]",
|
|
"mov w0, #0x401",
|
|
"str x0, [x28, #1496]",
|
|
"ldr x0, [x28, #2968]",
|
|
"br x0"
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]
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},
|
|
"vfnmsubsd xmm0, xmm1, xmm2, xmm3": {
|
|
"ExpectedInstructionCount": 6,
|
|
"Comment": [
|
|
"Map 3 0b01 0x7f 128-bit"
|
|
],
|
|
"ExpectedArm64ASM": [
|
|
"mov w20, #0x10000",
|
|
"str x20, [x28, #24]",
|
|
"mov w0, #0x401",
|
|
"str x0, [x28, #1496]",
|
|
"ldr x0, [x28, #2968]",
|
|
"br x0"
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]
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}
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}
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}
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