LC 9e8e87bbb2 AtomicOps: Avoid constrained unpredictable case in TelemetrySetValue() ...

STLXR cannot use the same register as both the status register and the
value register, otherwise it's architecturally unpredictable
behavior.

Only applies to hardware without FEAT_LSE, so this only meaningfully
affects hardware using the v8.0 spec, since FEAT_LSE becomes mandatory
in v8.1 and newer.

2026-07-13 19:08:17 -04:00

..

Config

CodeCache: Implement lazy code loading

2026-05-13 21:25:47 +02:00

Context

Context: Add support for single-step RIP ranges

2026-07-08 12:21:16 -07:00

Core

AtomicOps: Avoid constrained unpredictable case in TelemetrySetValue()

2026-07-13 19:08:17 -04:00

GDBJIT

GDBJIT: Use a const reference to read ExecutableFileInfo

2025-12-22 21:20:22 +01:00

IR

RegisterAllocationPass: Function cleanup

2026-07-13 15:26:51 -04:00