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steam-frame
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FEX-Emu--FEX
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https://github.com/FEX-Emu/FEX.git
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2026-10-13 08:00:30 +02:00
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9b7c9f0fb67dd3cef5ff4c0b3ef9e372f5ffba2e
FEX-Emu--FEX
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FEXCore
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LC
9b7c9f0fb6
Vector: Trim one instruction off insertq
...
We can fold a bitwise not and and pair into a bic
2026-07-09 14:58:04 -04:00
..
Config
CodeCache: Implement lazy code loading
2026-05-13 21:25:47 +02:00
Context
Context: Add support for single-step RIP ranges
2026-07-08 12:21:16 -07:00
Core
Vector: Trim one instruction off insertq
2026-07-09 14:58:04 -04:00
GDBJIT
GDBJIT: Use a const reference to read ExecutableFileInfo
2025-12-22 21:20:22 +01:00
IR
IR: Remove need to specify element size for vector bitwise ops
2026-07-09 13:26:51 -04:00