mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-14 13:00:41 +02:00
Ryan Houdek
8bb5462554
git blame shows that 718b3e6b4c added this
handler.
It doesn't explain why this was desired but it was never wired up to
anything. Just remove it.
111 lines
2.6 KiB
C++
111 lines
2.6 KiB
C++
// SPDX-License-Identifier: MIT
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/*
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$info$
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tags: ir|opts
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$end_info$
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*/
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#pragma once
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#include <FEXCore/Config/Config.h>
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#include <FEXCore/Utils/ThreadPoolAllocator.h>
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#include <FEXCore/fextl/memory.h>
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#include <FEXCore/fextl/string.h>
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#include <FEXCore/fextl/unordered_map.h>
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#include <FEXCore/fextl/vector.h>
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#include <functional>
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#include <utility>
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namespace FEXCore::Context {
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class ContextImpl;
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}
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namespace FEXCore::HLE {
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class SyscallHandler;
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}
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namespace FEXCore::IR {
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class PassManager;
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class IREmitter;
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class Pass {
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public:
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virtual ~Pass() = default;
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virtual bool Run(IREmitter *IREmit) = 0;
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void RegisterPassManager(PassManager *_Manager) {
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Manager = _Manager;
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}
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protected:
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PassManager *Manager;
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};
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class PassManager final {
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friend class InlineCallOptimization;
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public:
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void AddDefaultPasses(FEXCore::Context::ContextImpl *ctx, bool InlineConstants, bool StaticRegisterAllocation);
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void AddDefaultValidationPasses();
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Pass* InsertPass(fextl::unique_ptr<Pass> Pass, fextl::string Name = "") {
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auto PassPtr = InsertAt(Passes.end(), std::move(Pass))->get();
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if (!Name.empty()) {
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NameToPassMaping[Name] = PassPtr;
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}
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return PassPtr;
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}
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void InsertRegisterAllocationPass(bool OptimizeSRA, bool SupportsAVX);
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bool Run(IREmitter *IREmit);
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bool HasPass(fextl::string Name) const {
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return NameToPassMaping.contains(Name);
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}
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template<typename T>
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T* GetPass(fextl::string Name) {
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return dynamic_cast<T*>(NameToPassMaping[Name]);
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}
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Pass* GetPass(fextl::string Name) {
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return NameToPassMaping[Name];
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}
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void RegisterSyscallHandler(FEXCore::HLE::SyscallHandler *Handler) {
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SyscallHandler = Handler;
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}
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void Finalize();
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protected:
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FEXCore::HLE::SyscallHandler *SyscallHandler;
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private:
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using PassArrayType = fextl::vector<fextl::unique_ptr<Pass>>;
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PassArrayType::iterator InsertAt(PassArrayType::iterator pos, fextl::unique_ptr<Pass> Pass) {
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Pass->RegisterPassManager(this);
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return Passes.insert(pos, std::move(Pass));
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}
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PassArrayType Passes;
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fextl::unordered_map<fextl::string, Pass*> NameToPassMaping;
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#if defined(ASSERTIONS_ENABLED) && ASSERTIONS_ENABLED
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fextl::vector<fextl::unique_ptr<Pass>> ValidationPasses;
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void InsertValidationPass(fextl::unique_ptr<Pass> Pass, fextl::string Name = "") {
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Pass->RegisterPassManager(this);
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auto PassPtr = ValidationPasses.emplace_back(std::move(Pass)).get();
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if (!Name.empty()) {
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NameToPassMaping[Name] = PassPtr;
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}
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}
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#endif
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FEX_CONFIG_OPT(Is64BitMode, IS64BIT_MODE);
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FEX_CONFIG_OPT(PassManagerDumpIR, PASSMANAGERDUMPIR);
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};
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}
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