Paulo Matos 93e4288c57 Fix left shift undefined behaviour ...

Here BitOffset can have values higher than 32.

2024-05-16 10:22:03 +02:00

..

Config

Arm64: Adds another TSO hack to disable half-barrier TSO

2024-04-24 13:09:00 -07:00

Context

IR: drop IRParser

2024-05-08 14:16:54 -04:00

Core

Fix left shift undefined behaviour

2024-05-16 10:22:03 +02:00

GDBJIT

Whole-tree reformat

2024-04-12 16:26:02 +02:00

HLE/Thunks

IR: specify registers, not offsets for SRA

2024-05-08 14:01:42 -04:00

IR

FEXCore: Get rid of DeferredSignalFaultAddress and use the InterruptFaultPage

2024-05-10 15:31:28 -07:00