Ryan Houdek 8d110738ac IR: Add option to disable vector shift range clamping ...

The range check and clamping is necessary in the cases of passing x86
shift amounts directly through VUSHL/VSSHR.

Some AVX operations are still using these with range clamping. A future
investigation task should be the check if they can be switched over to
the wide variants that we implemented for the SSE instructions.

When consuming our own controlled data, we don't want the range clamping
to be enabled.

2023-08-27 21:07:20 -07:00

..

Crypto.cpp

OpcodeDispatcher: Remove redundant moves from AESIMC

2023-08-23 21:34:37 -04:00

Flags.cpp

OpcodeDispatcher: Minor optimization around clearing flags

2023-08-19 20:14:37 -07:00

Vector.cpp

IR: Add option to disable vector shift range clamping

2023-08-27 21:07:20 -07:00

X87.cpp

Move External/FEXCore/ to FEXCore/

2023-08-17 16:32:16 -04:00

X87F64.cpp

X8764: Ensure frndint uses host rounding mode

2023-08-25 16:04:01 -07:00