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FEX-Emu--FEX/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json
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{
"Features": {
"Bitness": 64,
"EnabledHostFeatures": [
"SVE128",
"SVE256",
"RPRES",
"AFP"
],
"DisabledHostFeatures": [],
"BinaryCacheVersion": 4
},
"Instructions": {
"vrsqrtps xmm0, xmm1": {
"ExpectedInstructionCount": 1,
"Comment": [
"Map 1 0b00 0x52 128-bit"
],
"ExpectedArm64ASM": [
"frsqrte v16.4s, v17.4s"
]
},
"vrsqrtps ymm0, ymm1": {
"ExpectedInstructionCount": 1,
"Comment": [
"Map 1 0b00 0x52 256-bit"
],
"ExpectedArm64ASM": [
"frsqrte z16.s, z17.s"
]
},
"vrsqrtss xmm0, xmm1, xmm2": {
"ExpectedInstructionCount": 2,
"Comment": [
"AFP can make this more optimal",
"Map 1 0b10 0x52 128-bit"
],
"ExpectedArm64ASM": [
"mov v16.16b, v17.16b",
"frsqrte s16, s18"
]
},
"vrcpps xmm0, xmm1": {
"ExpectedInstructionCount": 1,
"Comment": [
"Map 1 0b00 0x53 128-bit"
],
"ExpectedArm64ASM": [
"frecpe v16.4s, v17.4s"
]
},
"vrcpps ymm0, ymm1": {
"ExpectedInstructionCount": 1,
"Comment": [
"Map 1 0b00 0x53 256-bit"
],
"ExpectedArm64ASM": [
"frecpe z16.s, z17.s"
]
},
"vrcpss xmm0, xmm1, xmm2": {
"ExpectedInstructionCount": 2,
"Comment": [
"Map 1 0b10 0x53 128-bit"
],
"ExpectedArm64ASM": [
"mov v16.16b, v17.16b",
"frecpe s16, s18"
]
}
}
}