Files
FEX-Emu--FEX/External/FEXCore/Source/Interface/Core
Ryan Houdek 80a77b39be Implements RCR and RCL x86 ops
These are interesting rotate instructions that treats CF as an
additional rotation bit for the source.

So you end up with a 9bit, 17bit, 33bit, or 65bit rotate.
The rotate value is still masked by 0x1F or 0x3F depending on
instruction size.

This ends up with the quirk that this instruction doesn't directly map
to AArch64 rotations  for the smaller register sizes;
So we have to do some manual mirroring in a larger register to pull the
correct view out of the op
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