LC 73d6716828 AVX: Shave some moves off 256-bit VPALIGNR ...

Arbitrary insertion of an element requires the use of a predicate
register. Since we only care about a particular element in the vector,
being replicated, we can broadcast that element instead of doing an
insert, which is effectively the same thing without excessive busywork.

2026-06-22 10:09:13 -04:00

..

Config

CodeCache: Implement lazy code loading

2026-05-13 21:25:47 +02:00

Context

Merge pull request #5441 from neobrain/feature_mmap_code_cache

2026-05-20 17:19:11 -07:00

Core

AVX: Shave some moves off 256-bit VPALIGNR

2026-06-22 10:09:13 -04:00

GDBJIT

GDBJIT: Use a const reference to read ExecutableFileInfo

2025-12-22 21:20:22 +01:00

IR

IR: fix typo in CacheLineClean description

2026-06-24 00:38:59 +01:00