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FEX-Emu--FEX/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json
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2026-09-30 15:07:32 -07:00

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{
"Features": {
"Bitness": 64,
"EnabledHostFeatures": [
"I8MM"
],
"DisabledHostFeatures": [
"AFP",
"FLAGM",
"FLAGM2",
"SVE128",
"SVE256"
],
"BinaryCacheVersion": 29
},
"Instructions": {
"vpdpbusd xmm0, xmm1, xmm2": {
"x86InstructionCount": 1,
"ExpectedInstructionCount": 2,
"Comment": [
"Map 2 0b01 0x50 128-bit",
"vpdpbusd xmm0, xmm1, xmm2",
"NASM only emits the EVEX encoding, hand encode the VEX form"
],
"x86Insts": [
"db 0xc4, 0xe2, 0x71, 0x50, 0xc2"
],
"ExpectedArm64ASM": [
"usdot v16.4s, v17.16b, v18.16b",
"stp xzr, xzr, [x28, #192]"
]
},
"vpdpbusd ymm0, ymm1, ymm2": {
"x86InstructionCount": 1,
"ExpectedInstructionCount": 6,
"Comment": [
"Map 2 0b01 0x50 256-bit",
"vpdpbusd ymm0, ymm1, ymm2",
"NASM only emits the EVEX encoding, hand encode the VEX form"
],
"x86Insts": [
"db 0xc4, 0xe2, 0x75, 0x50, 0xc2"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #192]",
"ldr q3, [x28, #208]",
"ldr q4, [x28, #224]",
"usdot v16.4s, v17.16b, v18.16b",
"usdot v2.4s, v3.16b, v4.16b",
"str q2, [x28, #192]"
]
},
"vpdpbusds xmm0, xmm1, xmm2": {
"x86InstructionCount": 1,
"ExpectedInstructionCount": 4,
"Comment": [
"Map 2 0b01 0x51 128-bit",
"vpdpbusds xmm0, xmm1, xmm2",
"NASM only emits the EVEX encoding, hand encode the VEX form"
],
"x86Insts": [
"db 0xc4, 0xe2, 0x71, 0x51, 0xc2"
],
"ExpectedArm64ASM": [
"movi v2.2d, #0x0",
"usdot v2.4s, v17.16b, v18.16b",
"sqadd v16.4s, v16.4s, v2.4s",
"stp xzr, xzr, [x28, #192]"
]
},
"vpdpbusds ymm0, ymm1, ymm2": {
"x86InstructionCount": 1,
"ExpectedInstructionCount": 10,
"Comment": [
"Map 2 0b01 0x51 256-bit",
"vpdpbusds ymm0, ymm1, ymm2",
"NASM only emits the EVEX encoding, hand encode the VEX form"
],
"x86Insts": [
"db 0xc4, 0xe2, 0x75, 0x51, 0xc2"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #192]",
"ldr q3, [x28, #208]",
"ldr q4, [x28, #224]",
"movi v5.2d, #0x0",
"mov v6.16b, v5.16b",
"usdot v6.4s, v17.16b, v18.16b",
"sqadd v16.4s, v16.4s, v6.4s",
"usdot v5.4s, v3.16b, v4.16b",
"sqadd v2.4s, v2.4s, v5.4s",
"str q2, [x28, #192]"
]
},
"vpdpwssd xmm0, xmm1, xmm2": {
"x86InstructionCount": 1,
"ExpectedInstructionCount": 5,
"Comment": [
"Map 2 0b01 0x52 128-bit",
"vpdpwssd xmm0, xmm1, xmm2",
"NASM only emits the EVEX encoding, hand encode the VEX form"
],
"x86Insts": [
"db 0xc4, 0xe2, 0x71, 0x52, 0xc2"
],
"ExpectedArm64ASM": [
"smull v2.4s, v17.4h, v18.4h",
"smull2 v3.4s, v17.8h, v18.8h",
"addp v2.4s, v2.4s, v3.4s",
"add v16.4s, v16.4s, v2.4s",
"stp xzr, xzr, [x28, #192]"
]
},
"vpdpwssd ymm0, ymm1, ymm2": {
"x86InstructionCount": 1,
"ExpectedInstructionCount": 12,
"Comment": [
"Map 2 0b01 0x52 256-bit",
"vpdpwssd ymm0, ymm1, ymm2",
"NASM only emits the EVEX encoding, hand encode the VEX form"
],
"x86Insts": [
"db 0xc4, 0xe2, 0x75, 0x52, 0xc2"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #192]",
"ldr q3, [x28, #208]",
"ldr q4, [x28, #224]",
"smull v5.4s, v17.4h, v18.4h",
"smull2 v6.4s, v17.8h, v18.8h",
"addp v5.4s, v5.4s, v6.4s",
"add v16.4s, v16.4s, v5.4s",
"smull v5.4s, v3.4h, v4.4h",
"smull2 v3.4s, v3.8h, v4.8h",
"addp v3.4s, v5.4s, v3.4s",
"add v2.4s, v2.4s, v3.4s",
"str q2, [x28, #192]"
]
},
"vpdpwssds xmm0, xmm1, xmm2": {
"x86InstructionCount": 1,
"ExpectedInstructionCount": 6,
"Comment": [
"Map 2 0b01 0x53 128-bit",
"vpdpwssds xmm0, xmm1, xmm2",
"NASM only emits the EVEX encoding, hand encode the VEX form"
],
"x86Insts": [
"db 0xc4, 0xe2, 0x71, 0x53, 0xc2"
],
"ExpectedArm64ASM": [
"smull v2.4s, v17.4h, v18.4h",
"smull2 v3.4s, v17.8h, v18.8h",
"addp v2.4s, v2.4s, v3.4s",
"neg v2.4s, v2.4s",
"sqsub v16.4s, v16.4s, v2.4s",
"stp xzr, xzr, [x28, #192]"
]
},
"vpdpwssds ymm0, ymm1, ymm2": {
"x86InstructionCount": 1,
"ExpectedInstructionCount": 14,
"Comment": [
"Map 2 0b01 0x53 256-bit",
"vpdpwssds ymm0, ymm1, ymm2",
"NASM only emits the EVEX encoding, hand encode the VEX form"
],
"x86Insts": [
"db 0xc4, 0xe2, 0x75, 0x53, 0xc2"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #192]",
"ldr q3, [x28, #208]",
"ldr q4, [x28, #224]",
"smull v5.4s, v17.4h, v18.4h",
"smull2 v6.4s, v17.8h, v18.8h",
"addp v5.4s, v5.4s, v6.4s",
"neg v5.4s, v5.4s",
"sqsub v16.4s, v16.4s, v5.4s",
"smull v5.4s, v3.4h, v4.4h",
"smull2 v3.4s, v3.8h, v4.8h",
"addp v3.4s, v5.4s, v3.4s",
"neg v3.4s, v3.4s",
"sqsub v2.4s, v2.4s, v3.4s",
"str q2, [x28, #192]"
]
}
}
}