Files
FEX-Emu--FEX/unittests/InstructionCountCI/FlagM/SecondaryModRM.json
T
2026-09-04 17:03:46 +02:00

105 lines
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{
"Features": {
"Bitness": 64,
"EnabledHostFeatures": [
"CLZERO",
"FLAGM",
"FLAGM2"
],
"DisabledHostFeatures": [
"SVE128",
"SVE256",
"AFP"
],
"BinaryCacheVersion": 15
},
"Instructions": {
"xgetbv": {
"ExpectedInstructionCount": 52,
"Comment": "0xF 0x01 /2 RM-0",
"ExpectedArm64ASM": [
"sub sp, sp, #0xf0 (240)",
"mov x3, sp",
"st1 {v2.2d, v3.2d}, [x3], #32",
"st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x3], #64",
"st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x3], #64",
"st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x3], #64",
"stp x18, x30, [x3], #16",
"mrs x3, nzcv",
"str w3, [x28, #1032]",
"str x25, [x28, #176]",
"stp x4, x7, [x28, #32]",
"stp x5, x6, [x28, #48]",
"stp x8, x9, [x28, #64]",
"stp x10, x11, [x28, #80]",
"stp x12, x13, [x28, #96]",
"stp x14, x15, [x28, #112]",
"stp x16, x17, [x28, #128]",
"stp x19, x29, [x28, #144]",
"stp w26, w27, [x28, #16]",
"add x3, x28, #0x1c0 (448)",
"st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x3], #64",
"st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x3], #64",
"st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x3], #64",
"st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x3], #64",
"mov w1, w7",
"ldr x0, [x28, #1552]",
"ldr x2, [x28, #1568]",
"blr x2",
"ldr x25, [x28, #176]",
"ldr w4, [x28, #1032]",
"msr nzcv, x4",
"add x4, x28, #0x1c0 (448)",
"ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64",
"ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64",
"ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64",
"ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64",
"ldp x4, x7, [x28, #32]",
"ldp x5, x6, [x28, #48]",
"ldp x8, x9, [x28, #64]",
"ldp x10, x11, [x28, #80]",
"ldp x12, x13, [x28, #96]",
"ldp x14, x15, [x28, #112]",
"ldp x16, x17, [x28, #128]",
"ldp x19, x29, [x28, #144]",
"ldp w26, w27, [x28, #16]",
"ld1 {v2.2d, v3.2d}, [sp], #32",
"ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
"ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64",
"ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64",
"ldp x18, x30, [sp], #16",
"mov w4, w0",
"lsr x5, x0, #32"
]
},
"rdtscp": {
"Skip": "Yes",
"ExpectedInstructionCount": 21,
"Comment": "0xF 0x01 /7 RM-1",
"ExpectedArm64ASM": [
"dmb ld",
"mrs x20, S3_3_c14_c0_2",
"lsl w4, w20, #7",
"lsr x5, x20, #25",
"mrs x0, nzcv",
"str w0, [x28, #1000]",
"str x8, [x28, #312]",
"mov w0, #0x100",
"str x0, [x28, #1312]",
"sub sp, sp, #0x10 (16)",
"mov w8, #0xa8",
"mov x0, sp",
"add x1, sp, #0x4 (4)",
"svc #0x0",
"ldp w0, w1, [sp]",
"sub sp, sp, #0x10 (16)",
"ldr w8, [x28, #1000]",
"msr nzcv, x8",
"ldr x8, [x28, #312]",
"str xzr, [x28, #1312]",
"orr x7, x0, x1, lsl #12"
]
}
}
}