Alyssa Rosenzweig 65ee1fafa8 IR: drop RegisterAllocationData ...

This sideband is now unused, registers are encoded directly in the IR. So we can
garbage collect all this code for quite some savings.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

2025-05-19 13:42:59 -04:00

..

config_generator.py

Fix pylance warning about possible unbound var

2025-03-27 15:53:46 +01:00

json_ir_doc_generator.py

Move External/FEXCore/ to FEXCore/

2023-08-17 16:32:16 -04:00

json_ir_generator.py

IR: drop RegisterAllocationData

2025-05-19 13:42:59 -04:00