Alyssa Rosenzweig 6de8bc6848 IR: Annotate instructions with implicit flag clobber ...

Audit the code base and mark any instruction that implicitly clobbers flags so
it can get special handling in the dispatcher to spill NZCV ahead of emitting.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

2023-10-23 10:21:47 -04:00

..

Config

FEXCore: Implements support for RPRES

2023-10-07 23:13:47 -07:00

Context

InstCountCI: Support multiple instructions in the tests

2023-10-09 21:49:53 -07:00

Core

IR: Add infrastructure for modelling flag clobbers

2023-10-23 10:21:47 -04:00

GDBJIT

FEXCore/Interface/GDBJIT: Adds SPDX identifier

2023-09-19 17:33:15 -07:00

HLE/Thunks

FEXCore/Interface/Thunks: Adds SPDX identifier

2023-09-19 17:33:14 -07:00

IR

IR: Annotate instructions with implicit flag clobber

2023-10-23 10:21:47 -04:00