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https://github.com/FEX-Emu/FEX.git
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crueter
9e8463d6d7
- Do compiler/architecture checks EARLY, don't waste time doing random configuration stuff if the user can't even compile in the first place - MSVC is unsupported, I assume? So add a check to disallow. There's literally no MSVC or MSC_VER checks anywhere, so... - Rather than using the MSVC architecture definitions, use our own `ARCHITECTURE_arm64` et al. Hijacking existing "standard" definitions is a very bad idea. Also makes it more readable in CMake - Change the x86 host check to `x86|amd64`. Some systems still refer to themselves as x86 despite being 64-bit for... reasons, and I saw one a very long time ago that referred to it as amd64. This should basically never come up, nor is it really relevant given that FEX is for arm64... but it kinda annoyed me so whatever. TODOs: - Should we check `CMAKE_SIZEOF_VOID_P (equal) 64`? I don't think anyone is even trying to compile this thing on armv7 or older, but might as well? maybe? - What's the status of *BSD, Solaris, macOS? Technically macOS does support Wine, not sure about the others. Signed-off-by: crueter <crueter@eden-emu.dev>
96 lines
2.4 KiB
C++
96 lines
2.4 KiB
C++
#pragma once
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#include <cstdint>
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#ifdef ARCHITECTURE_x86_64
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#include <cpuid.h>
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namespace FEX::X86 {
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class Features final {
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public:
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Features() {
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cpuid_data data {};
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data = cpuid(0);
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if (data.eax >= 1) {
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auto data_1 = cpuid(0x1);
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Feat_aes = data_1.ecx & (1U << 25);
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Feat_crc = data_1.ecx & (1U << 20);
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Feat_rand = data_1.ecx & (1U << 30);
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Feat_pclmulqdq = data_1.ecx & (1U << 1);
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Feat_avx = data_1.ecx & (1U << 28);
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Feat_ssse3 = data_1.ecx & (1U << 9);
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Feat_sse4_1 = data_1.ecx & (1U << 19);
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Feat_sse4_2 = data_1.ecx & (1U << 20);
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Feat_movbe = data_1.ecx & (1U << 22);
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Feat_xsave = data_1.ecx & (1U << 26);
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}
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if (data.eax >= 7) {
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auto data_7 = cpuid(0x7);
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Feat_fsgsbase = data_7.ebx & (1U << 0);
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Feat_bmi1 = data_7.ebx & (1U << 3);
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Feat_avx &= data_7.ebx & (1U << 5);
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Feat_bmi2 = data_7.ebx & (1U << 8);
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Feat_clwb = data_7.ebx & (1U << 24);
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Feat_rand &= data_7.ebx & (1U << 18);
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Feat_adx = data_7.ebx & (1U << 19);
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Feat_clflopt = data_7.ebx & (1U << 23);
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Feat_sha = data_7.ebx & (1U << 29);
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Feat_vaes = data_7.ecx & (1U << 9);
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Feat_pclmulqdq &= data_7.ecx & (1U << 10);
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Feat_rdpid = data_7.ecx & (1U << 22);
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}
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data = cpuid(0x8000'0000U);
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if (data.eax >= 0x8000'0001U) {
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auto data_8000_0001 = cpuid(0x8000'0001U);
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Feat_3dnow = (data_8000_0001.edx >> 30) == 0b11;
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Feat_sse4a = data_8000_0001.ecx & (1U << 6);
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}
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if (data.eax >= 0x8000'0008U) {
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auto data_8000_0008 = cpuid(0x8000'0008U);
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Feat_clzero = data_8000_0008.ebx & 1;
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}
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}
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// Features.
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bool Feat_3dnow {};
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bool Feat_sse4a {};
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bool Feat_bmi1 {};
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bool Feat_bmi2 {};
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bool Feat_clwb {};
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bool Feat_aes {};
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bool Feat_crc {};
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bool Feat_rand {};
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bool Feat_sha {};
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bool Feat_pclmulqdq {};
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bool Feat_vaes {};
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bool Feat_clzero {};
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bool Feat_avx {};
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bool Feat_ssse3 {};
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bool Feat_sse4_1 {};
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bool Feat_sse4_2 {};
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bool Feat_movbe {};
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bool Feat_adx {};
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bool Feat_xsave {};
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bool Feat_rdpid {};
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bool Feat_clflopt {};
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bool Feat_fsgsbase {};
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private:
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struct cpuid_data {
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uint32_t eax, ebx, ecx, edx;
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};
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cpuid_data cpuid(uint32_t Function, uint32_t Leaf = 0) {
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cpuid_data data;
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__cpuid_count(Function, Leaf, data.eax, data.ebx, data.ecx, data.edx);
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return data;
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}
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};
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} // namespace FEX::X86
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#endif
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