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In a large number of cases we are moving pointers within a 4GB region and some marginal pointers that are within 1MB. This is only used in the case that MOVZ can't be used. NOP padding still occurs after these instructions to ensure that if they are being used with relocations it will still get padded to a full 4 instruction length. Not all hardware fuses these and LLVM claims that Cortex beyond A72 even doesn't, but it'll still be faster.