Alyssa Rosenzweig 61758ea47d OpcodeDispatcher: eliminate branch in cmpxchg pair ...

In the old case:

* if we take the branch, 1 instruction
* if we don't take the branch, 3 instruction
* branch predictor fun
* 3 instructions of icache pressure

In the new case:

* unconditionally 2 instructions
* no branch predictor dependence
* 2 instructions of icache pressure

This should not be non-neglibly worse, and it simplifies things for RA.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

2024-03-27 12:40:06 -04:00

..

Config

Merge pull request #3511 from Sonicadvance1/more_tso_levers

2024-03-26 23:23:41 -07:00

Context

Disable assert in release

2024-03-10 22:01:50 -07:00

Core

OpcodeDispatcher: eliminate branch in cmpxchg pair

2024-03-27 12:40:06 -04:00

GDBJIT

FEXCore/Interface/GDBJIT: Adds SPDX identifier

2023-09-19 17:33:15 -07:00

HLE/Thunks

Library Forwarding: Allocate packed arguments on the guest stack if needed

2024-02-05 18:10:34 +01:00

IR

RA: Adds RIP when a block panic spills

2024-03-24 17:11:29 -07:00