Ryan Houdek e1d21f0bff IR: Implements new CacheLineZero op ...

This zeroes out an emulated 64byte cacheline. Writing zeros to memory.
This very specifically is only 64bytes to match x86 behaviour.
Also specifically non-temporal and weakly ordered. Which matches x86
CLZero behaviour.

2021-12-03 21:14:02 -08:00

..

Passes

RegisterAllocationPass: Resolve sign comparison mismatch in CalculateNodeInterference()

2021-12-02 18:13:01 -05:00

IR.json

IR: Implements new CacheLineZero op

2021-12-03 21:14:02 -08:00

IRDumper.cpp

IR: Convert NodeID into a strong type

2021-12-02 15:04:57 -05:00

IREmitter.cpp

Fix ReplaceUsesWithAfter:

2021-09-13 15:43:26 +12:00

IRParser.cpp

FEXCore: Supports guest SIGILL

2021-11-19 12:49:23 -08:00

Passes.h

Register Allocator Validation

2021-09-13 11:56:29 +12:00

PassManager.cpp

Register Allocator Validation

2021-09-13 11:56:29 +12:00

PassManager.h

PassManager: Lookup pass by name

2021-09-13 11:46:11 +12:00