mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-06 08:00:15 +02:00
103 lines
2.6 KiB
JSON
103 lines
2.6 KiB
JSON
{
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"Features": {
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"Bitness": 64,
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"EnabledHostFeatures": [
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"SVE128"
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],
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"DisabledHostFeatures": [
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"AFP",
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"SVE256"
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],
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"BinaryCacheVersion": 7
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},
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"Instructions": {
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"vblendvps xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 4,
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"Comment": [
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"Map 3 0b01 0x4a 128-bit"
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],
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"ExpectedArm64ASM": [
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"sshr v2.4s, v19.4s, #31",
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"movprfx z16, z18",
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"bsl z16.d, z16.d, z17.d, z2.d",
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"stp xzr, xzr, [x28, #192]"
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]
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},
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"vblendvps ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 9,
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"Comment": [
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"Map 3 0b01 0x4a 256-bit"
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],
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"ExpectedArm64ASM": [
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"ldr q2, [x28, #208]",
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"ldr q3, [x28, #224]",
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"ldr q4, [x28, #240]",
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"sshr v5.4s, v19.4s, #31",
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"movprfx z16, z18",
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"bsl z16.d, z16.d, z17.d, z5.d",
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"sshr v4.4s, v4.4s, #31",
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"bsl v4.16b, v3.16b, v2.16b",
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"str q4, [x28, #192]"
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]
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},
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"vblendvpd xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 4,
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"Comment": [
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"Map 3 0b01 0x4b 128-bit"
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],
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"ExpectedArm64ASM": [
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"sshr v2.2d, v19.2d, #63",
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"movprfx z16, z18",
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"bsl z16.d, z16.d, z17.d, z2.d",
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"stp xzr, xzr, [x28, #192]"
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]
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},
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"vblendvpd ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 9,
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"Comment": [
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"Map 3 0b01 0x4b 256-bit"
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],
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"ExpectedArm64ASM": [
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"ldr q2, [x28, #208]",
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"ldr q3, [x28, #224]",
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"ldr q4, [x28, #240]",
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"sshr v5.2d, v19.2d, #63",
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"movprfx z16, z18",
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"bsl z16.d, z16.d, z17.d, z5.d",
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"sshr v4.2d, v4.2d, #63",
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"bsl v4.16b, v3.16b, v2.16b",
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"str q4, [x28, #192]"
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]
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},
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"vpblendvb xmm0, xmm1, xmm2, xmm3": {
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"ExpectedInstructionCount": 4,
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"Comment": [
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"Map 3 0b01 0x4c 128-bit"
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],
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"ExpectedArm64ASM": [
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"sshr v2.16b, v19.16b, #7",
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"movprfx z16, z18",
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"bsl z16.d, z16.d, z17.d, z2.d",
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"stp xzr, xzr, [x28, #192]"
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]
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},
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"vpblendvb ymm0, ymm1, ymm2, ymm3": {
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"ExpectedInstructionCount": 9,
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"Comment": [
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"Map 3 0b01 0x4c 256-bit"
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],
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"ExpectedArm64ASM": [
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"ldr q2, [x28, #208]",
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"ldr q3, [x28, #224]",
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"ldr q4, [x28, #240]",
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"sshr v5.16b, v19.16b, #7",
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"movprfx z16, z18",
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"bsl z16.d, z16.d, z17.d, z5.d",
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"sshr v4.16b, v4.16b, #7",
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"bsl v4.16b, v3.16b, v2.16b",
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"str q4, [x28, #192]"
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]
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}
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}
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}
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