mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-11 01:00:20 +02:00
Ryan Houdek
2d4bf97cac
This can be done in an OS agnostic fashion. FEXCore knows the details of its JIT and should be done in FEXCore itself. The frontend is only necessary to inform FEXCore where the fault occured and provide the array of GPRs for accessing and modifying the signal state. This is necessary for supporting both Linux and Wine signal contexts with their unaligned access handlers.
293 lines
9.3 KiB
C++
293 lines
9.3 KiB
C++
#include "ArchHelpers/UContext.h"
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#include "LinuxSyscalls/SignalDelegator.h"
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#include <FEXCore/Config/Config.h>
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#include <FEXCore/Core/CPUBackend.h>
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#include <FEXCore/Core/Context.h>
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#include <FEXCore/Core/CoreState.h>
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#include <FEXCore/Core/X86Enums.h>
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#include <FEXCore/Debug/InternalThreadState.h>
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#include <FEXCore/fextl/list.h>
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#include <FEXCore/fextl/unordered_map.h>
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#include <FEXCore/fextl/unordered_set.h>
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#include <FEXCore/Utils/LogManager.h>
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#ifdef _M_X86_64
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#include <asm/ldt.h>
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#include <sys/syscall.h>
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#endif
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#include <stddef.h>
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#include <stdint.h>
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#include <string.h>
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#include <string>
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#include <ucontext.h>
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#include <vector>
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#include <signal.h>
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#define XBYAK_CUSTOM_ALLOC
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#define XBYAK_CUSTOM_MALLOC FEXCore::Allocator::malloc
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#define XBYAK_CUSTOM_FREE FEXCore::Allocator::free
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#define XBYAK_CUSTOM_SETS
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#define XBYAK_STD_UNORDERED_SET fextl::unordered_set
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#define XBYAK_STD_UNORDERED_MAP fextl::unordered_map
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#define XBYAK_STD_UNORDERED_MULTIMAP fextl::unordered_multimap
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#define XBYAK_STD_LIST fextl::list
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#include <xbyak/xbyak.h>
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using namespace Xbyak;
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#ifdef _M_X86_64
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static inline int modify_ldt(int func, void *ldt) { return ::syscall(SYS_modify_ldt, func, ldt, sizeof(struct user_desc)); }
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class x86HostRunner final : public Xbyak::CodeGenerator {
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public:
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using AsmDispatch = void (*)(uintptr_t InitialRip, uintptr_t InitialStack);
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AsmDispatch DispatchPtr;
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x86HostRunner() : CodeGenerator(4096) {
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Setup32BitCodeSegment();
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DispatchPtr = getCurr<AsmDispatch>();
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// x86-64 ABI has the stack aligned when /call/ happens
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// Which means the destination has a misaligned stack at that point
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push(rbx);
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push(rbp);
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push(r12);
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push(r13);
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push(r14);
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push(r15);
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sub(rsp, 8);
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// Save this stack pointer so we can cleanly shutdown the emulation with a long jump
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// regardless of where we were in the stack
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mov(rax, (uint64_t)&ReturningStackLocation);
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mov(qword[rax], rsp);
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mov(rax, 0);
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mov(rbx, 0);
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mov(rcx, 0);
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mov(rdx, 0);
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mov(rbp, 0);
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mov(rsi, 0);
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mov(r8, 0);
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mov(r9, 0);
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mov(r10, 0);
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mov(r11, 0);
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mov(r12, 0);
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mov(r13, 0);
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mov(r14, 0);
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mov(r15, 0);
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finit();
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if (Is64BitMode()) {
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push(rdi);
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// Load our RIP
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// RSP won't be set to zero here but should be fine
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ret();
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} else {
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// Far call needs to go through a gate
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// This is setup just like the following packing
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// {
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// uint32_t RIP;
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// uint16_t CodeSegment;
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// }
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GetCodeSegmentEntryLocation = getCurr<uint64_t>();
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hlt();
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Label Gate{};
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// Patch gate entry point
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// mov(dword[rip + Gate], edi)
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jmp(qword [rip + Gate], LabelType::T_FAR);
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L(Gate);
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dd(0x1'0000); // This is a 32-bit offset from the start of the gate. We start at 0x1'0000 + 0
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dw(CodeSegmentEntry);
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}
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ThreadStopHandlerAddress = getCurr<uint64_t>();
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add(rsp, 8);
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pop(r15);
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pop(r14);
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pop(r13);
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pop(r12);
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pop(rbp);
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pop(rbx);
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ret();
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ready();
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}
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bool HandleSIGSEGV(FEXCore::Core::CPUState *OutState, int Signal, void *info, void *ucontext) {
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ucontext_t *_context = (ucontext_t *)ucontext;
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mcontext_t *_mcontext = &_context->uc_mcontext;
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// Check our current instruction that we just executed to ensure it was an HLT
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uint8_t *Inst{};
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Inst = reinterpret_cast<uint8_t *>(_mcontext->gregs[REG_RIP]);
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if (!Is64BitMode()) {
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if (_mcontext->gregs[REG_RIP] == GetCodeSegmentEntryLocation) {
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// Backup the CSGSFS register
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GlobalCodeSegmentEntry = _mcontext->gregs[REG_CSGSFS];
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// Skip past this hlt and keep running
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_mcontext->gregs[REG_RIP] += 1;
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return true;
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}
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}
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constexpr uint8_t HLT = 0xF4;
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if (Inst[0] != HLT) {
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return false;
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}
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// Store our host state in to the guest for testing against
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OutState->gregs[FEXCore::X86State::REG_RAX] = _mcontext->gregs[REG_RAX];
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OutState->gregs[FEXCore::X86State::REG_RBX] = _mcontext->gregs[REG_RBX];
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OutState->gregs[FEXCore::X86State::REG_RCX] = _mcontext->gregs[REG_RCX];
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OutState->gregs[FEXCore::X86State::REG_RDX] = _mcontext->gregs[REG_RDX];
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OutState->gregs[FEXCore::X86State::REG_RBP] = _mcontext->gregs[REG_RBP];
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OutState->gregs[FEXCore::X86State::REG_RSI] = _mcontext->gregs[REG_RSI];
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OutState->gregs[FEXCore::X86State::REG_RDI] = _mcontext->gregs[REG_RDI];
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OutState->gregs[FEXCore::X86State::REG_RSP] = _mcontext->gregs[REG_RSP];
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OutState->gregs[FEXCore::X86State::REG_R8] = _mcontext->gregs[REG_R8];
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OutState->gregs[FEXCore::X86State::REG_R9] = _mcontext->gregs[REG_R9];
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OutState->gregs[FEXCore::X86State::REG_R10] = _mcontext->gregs[REG_R10];
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OutState->gregs[FEXCore::X86State::REG_R11] = _mcontext->gregs[REG_R11];
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OutState->gregs[FEXCore::X86State::REG_R12] = _mcontext->gregs[REG_R12];
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OutState->gregs[FEXCore::X86State::REG_R13] = _mcontext->gregs[REG_R13];
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OutState->gregs[FEXCore::X86State::REG_R14] = _mcontext->gregs[REG_R14];
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OutState->gregs[FEXCore::X86State::REG_R15] = _mcontext->gregs[REG_R15];
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OutState->rip = _mcontext->gregs[REG_RIP];
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for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_XMMS; ++i) {
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memcpy(&OutState->xmm.avx.data[i], &_mcontext->fpregs->_xmm[i], sizeof(_mcontext->fpregs->_xmm[0]));
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}
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const auto* xstate = reinterpret_cast<FEXCore::x86_64::xstate*>(_mcontext->fpregs);
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const auto* reserved = &xstate->fpstate.sw_reserved;
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if (reserved->HasExtendedContext() && reserved->HasYMMH()) {
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for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_XMMS; i++) {
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memcpy(&OutState->xmm.avx.data[i][2], &xstate->ymmh.ymmh_space[i],
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sizeof(xstate->ymmh.ymmh_space[0]));
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}
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}
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const uint16_t CurrentOffset = (_mcontext->fpregs->swd >> 11) & 7;
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for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_MMS; ++i) {
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memcpy(&OutState->mm[(i + CurrentOffset) % 8], &_mcontext->fpregs->_st[i], sizeof(_mcontext->fpregs->_st[0]));
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}
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// Our thread is stopping
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// We don't care about anything at this point
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// Set the stack to our starting location when we entered the JIT and get out safely
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_mcontext->gregs[REG_RSP] = ReturningStackLocation;
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// Set the new PC
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_mcontext->gregs[REG_RIP] = ThreadStopHandlerAddress;
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if (!Is64BitMode()) {
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// Unset code segment so we can jump back in to 64-bit mode
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_mcontext->gregs[REG_CSGSFS] = GlobalCodeSegmentEntry;
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}
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return true;
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}
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private:
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FEX_CONFIG_OPT(Is64BitMode, IS64BIT_MODE);
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int CodeSegmentEntry{};
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int GlobalCodeSegmentEntry{};
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uint64_t GetCodeSegmentEntryLocation;
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uint64_t ReturningStackLocation;
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uint64_t ThreadStopHandlerAddress;
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uint32_t MakeSelector(int Segment, bool LDT) const {
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// Selector Index, Table Indicator (1 = LDT, 0 = GDT), CPL (3 = userland)
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return (Segment << 3) | ((uint32_t)LDT << 2) | 3;
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};
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void Setup32BitCodeSegment() {
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if (Is64BitMode()) {
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return;
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}
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struct user_desc ldt {};
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ldt.entry_number = 1;
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// This is where HarnessCodeLoader loads code to
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ldt.base_addr = 0;
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ldt.limit = ~0U; // No limit
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ldt.seg_32bit = 1; // 32-bit
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ldt.contents = MODIFY_LDT_CONTENTS_CODE;
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ldt.read_exec_only = 0;
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ldt.limit_in_pages = 1;
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ldt.seg_not_present = 0;
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ldt.useable = 1;
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ldt.lm = 0; // Not-64-bit
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int Res = modify_ldt(0x11, &ldt);
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if (Res == -1) {
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LogMan::Msg::EFmt("Couldn't load 32-bit LDT");
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return;
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}
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CodeSegmentEntry = MakeSelector(ldt.entry_number, 1);
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// Make the data segment follow directly after the code segment
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// Overlapping region makes it read/write
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ldt.entry_number = 2;
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// This is where HarnessCodeLoader loads code to
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ldt.base_addr = 0;
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ldt.limit = ~0U; // No limit
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ldt.seg_32bit = 1; // 32-bit
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ldt.contents = MODIFY_LDT_CONTENTS_DATA;
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ldt.read_exec_only = 0;
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ldt.limit_in_pages = 1;
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ldt.seg_not_present = 0;
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ldt.useable = 1;
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ldt.lm = 0; // Not-64-bit
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Res = modify_ldt(0x11, &ldt);
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if (Res == -1) {
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LogMan::Msg::EFmt("Couldn't load 32-bit LDT");
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return;
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}
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// Stack entry overlapping data
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ldt.entry_number = 3;
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// This is where HarnessCodeLoader loads code to
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ldt.base_addr = 0;
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ldt.limit = ~0U; // No limit
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ldt.seg_32bit = 1; // 32-bit
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ldt.contents = MODIFY_LDT_CONTENTS_STACK;
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ldt.read_exec_only = 0;
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ldt.limit_in_pages = 1;
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ldt.seg_not_present = 0;
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ldt.useable = 1;
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ldt.lm = 0; // Not-64-bit
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Res = modify_ldt(0x11, &ldt);
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if (Res == -1) {
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LogMan::Msg::EFmt("Couldn't load 32-bit LDT");
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return;
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}
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}
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};
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void RunAsHost(fextl::unique_ptr<FEX::HLE::SignalDelegator> &SignalDelegation, uintptr_t InitialRip, uintptr_t StackPointer,
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FEXCore::Core::CPUState *OutputState) {
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x86HostRunner runner;
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SignalDelegation->RegisterHostSignalHandler(
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SIGSEGV,
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[&runner, OutputState](FEXCore::Core::InternalThreadState *Thread, int Signal, void *info, void *ucontext) -> bool {
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return runner.HandleSIGSEGV(OutputState, Signal, info, ucontext);
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},
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true
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);
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runner.DispatchPtr(InitialRip, StackPointer);
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}
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#else
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void RunAsHost(fextl::unique_ptr<FEX::HLE::SignalDelegator> &SignalDelegation, uintptr_t InitialRip, uintptr_t StackPointer,
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FEXCore::Core::CPUState *OutputState) {
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LOGMAN_MSG_A_FMT("RunAsHost doesn't exist for this host");
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}
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#endif
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