Billy Laws 481787d45c OpDispatcher: Avoid using the register cache for AbridgedFTW ...

This is now cached internally in the X87 pass, and all operations
outside of that that use it are rare so can afford loading/storing
directly from context after flushing x87 regs.

2025-09-09 21:30:30 +01:00

..

AVX_128.cpp

X86Tables: Convert AVX tables to constexpr

2025-08-27 14:55:10 -07:00

BaseTables.h

X86Tables: Moves Base ops to be constexpr

2025-08-27 12:24:25 -07:00

Crypto.cpp

X86Tables: Have AVX256 table always have PCLMUL

2025-08-27 13:06:43 -07:00

DDDTables.h

FEXCore/OpcodeDispatcher: Removes tuple usage for Dispatch tables

2025-07-16 13:57:16 -07:00

Flags.cpp

ConstProp: drop pass

2025-08-06 20:40:49 -04:00

H0F3ATables.h

X86Tables: Converts H0F3A table to constexpr

2025-08-27 12:24:24 -07:00

H0F38Tables.h

X86Tables: Converts H0F38 table to constexpr

2025-08-27 12:24:24 -07:00

PrimaryGroupTables.h

OpcodeDispatcher: Implement support for CALLF/RETF

2025-08-13 16:18:12 -07:00

SecondaryGroupTables.h

FEXCore: Move SecondaryGroupTables Arch specific ops to a table

2025-08-27 12:24:24 -07:00

SecondaryModRMTables.h

X86Tables: Move Second ModRM table to be constexpr

2025-08-27 12:24:25 -07:00

SecondaryTables.h

X86Tables: Convert Secondary tables to constexpr

2025-08-27 12:24:25 -07:00

Vector.cpp

OpDispatcher: Avoid using the register cache for AbridgedFTW

2025-09-09 21:30:30 +01:00

VEXTables.h

FEXCore/OpcodeDispatcher: Removes tuple usage for Dispatch tables

2025-07-16 13:57:16 -07:00

X87.cpp

OpDispatcher: Avoid using the register cache for AbridgedFTW

2025-09-09 21:30:30 +01:00

X87F64.cpp

IR: introduce & use more add helpers

2025-08-06 20:40:49 -04:00