Ryan Houdek 3f08d8b691 OpcodeDispatcher: Fixes 32-bit fs/gs write instructions ...

Documentation claims that these insert the lower 32-bits leaving the
upper bits unaffected.
Hardware testing proves that the upper 32-bits of the base registers are
zero'd.

Additional documentation also concurs that this is the case.

2022-05-13 02:42:28 -07:00

..

Config

Config: Adds code object cache config option

2022-05-06 10:26:44 -07:00

Context

Core: Add support for process-wide code invalidation, rename IR invalidate op to do thread specific invalidation

2022-05-02 01:49:49 +03:00

Core

OpcodeDispatcher: Fixes 32-bit fs/gs write instructions

2022-05-13 02:42:28 -07:00

HLE/Thunks

Thunks: Fail if thunking is enabled for a library that isn't installed

2021-11-30 17:39:01 +01:00

IR

Arm64: Adds support for RCPC2 extension

2022-05-12 07:13:47 -07:00