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Ryan Houdek
b3a7a973a1
The codepath from #3826 was only targeting 256-bit sized operations. This missed the vpgatherdq/vgatherdpd 128-bit operations. By extending the codepath to understand 128-bit operations, we now hit these instruction variants. With this PR, we now have SVE128 codepaths that handle ALL variants of x86 gather instructions! There are zero ASIMD fallbacks used in this case! Of course depending on the instruction, the performance still leaves a lot to be desired, and there is no way to emulate x86 TSO behaviour without an ASIMD fallback, which we will likely need to add as a fallback at some point. Based on #3836 until that is merged.