mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-14 11:01:01 +02:00
Ryan Houdek
38ff936c81
The IRHeader itself contains a flag for if a block should fallback to the interpreter. This is necessary for the case that an IR is loaded and the Frontend object no longer has the data necessary to know if it should do an interpreter fallback. This is super useful for bisecting JIT versus Intepreter failures, and also cases where falling back to intepreter for compatibility is a lot more simple than wiring things through the JIT (ala x87) This isn't currently utilized, but will be once x87 work lands
492 lines
16 KiB
C++
492 lines
16 KiB
C++
#include "IRLoader/Loader.h"
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#include "LogManager.h"
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#include <fstream>
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namespace {
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std::string ltrim(std::string String) {
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size_t pos = std::string::npos;
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if ((pos = String.find_first_not_of(" \t\n\r")) != std::string::npos) {
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String.erase(0, pos);
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}
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return String;
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}
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std::string rtrim(std::string String) {
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size_t pos = std::string::npos;
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if ((pos = String.find_last_not_of(" \t\n\r")) != std::string::npos) {
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String.erase(String.begin() + pos + 1, String.end());
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}
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return String;
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}
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std::string trim(std::string String) {
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return rtrim(ltrim(String));
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}
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std::string DecodeErrorToString(DecodeFailure Failure) {
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switch (Failure) {
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case DecodeFailure::DECODE_OKAY: return "Okay";
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case DecodeFailure::DECODE_UNKNOWN_TYPE: return "Unknown Type";
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case DecodeFailure::DECODE_INVALID: return "Invalid";
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case DecodeFailure::DECODE_INVALIDCHAR: return "Invalid starting char";
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case DecodeFailure::DECODE_INVALIDRANGE: return "Invalid integer range";
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case DecodeFailure::DECODE_INVALIDREGISTERCLASS: return "Invalid register class";
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case DecodeFailure::DECODE_UNKNOWN_SSA: return "Unknown SSA value";
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case DecodeFailure::DECODE_INVALID_CONDFLAG: return "Invalid Conditional name";
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};
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}
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}
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namespace FEX::IRLoader {
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std::unordered_map<std::string_view, FEXCore::IR::IROps> NameToOpMap;
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template<>
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std::pair<DecodeFailure, uint8_t> Loader::DecodeValue(std::string &Arg) {
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if (Arg.at(0) != '#') return {DecodeFailure::DECODE_INVALIDCHAR, 0};
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uint8_t Result = strtoul(&Arg.at(1), nullptr, 0);
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if (errno == ERANGE) return {DecodeFailure::DECODE_INVALIDRANGE, 0};
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return {DecodeFailure::DECODE_OKAY, Result};
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}
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template<>
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std::pair<DecodeFailure, uint16_t> Loader::DecodeValue(std::string &Arg) {
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if (Arg.at(0) != '#') return {DecodeFailure::DECODE_INVALIDCHAR, 0};
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uint16_t Result = strtoul(&Arg.at(1), nullptr, 0);
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if (errno == ERANGE) return {DecodeFailure::DECODE_INVALIDRANGE, 0};
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return {DecodeFailure::DECODE_OKAY, Result};
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}
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template<>
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std::pair<DecodeFailure, uint32_t> Loader::DecodeValue(std::string &Arg) {
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if (Arg.at(0) != '#') return {DecodeFailure::DECODE_INVALIDCHAR, 0};
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uint32_t Result = strtoul(&Arg.at(1), nullptr, 0);
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if (errno == ERANGE) return {DecodeFailure::DECODE_INVALIDRANGE, 0};
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return {DecodeFailure::DECODE_OKAY, Result};
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}
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template<>
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std::pair<DecodeFailure, uint64_t> Loader::DecodeValue(std::string &Arg) {
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if (Arg.at(0) != '#') return {DecodeFailure::DECODE_INVALIDCHAR, 0};
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uint64_t Result = strtoull(&Arg.at(1), nullptr, 0);
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if (errno == ERANGE) return {DecodeFailure::DECODE_INVALIDRANGE, 0};
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return {DecodeFailure::DECODE_OKAY, Result};
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}
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template<>
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std::pair<DecodeFailure, FEXCore::IR::RegisterClassType> Loader::DecodeValue(std::string &Arg) {
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if (Arg == "GPR") {
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return {DecodeFailure::DECODE_OKAY, FEXCore::IR::GPRClass};
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}
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else if (Arg == "FPR") {
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return {DecodeFailure::DECODE_OKAY, FEXCore::IR::FPRClass};
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}
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else if (Arg == "GPRPair") {
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return {DecodeFailure::DECODE_OKAY, FEXCore::IR::GPRPairClass};
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}
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else if (Arg == "Complex") {
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return {DecodeFailure::DECODE_OKAY, FEXCore::IR::ComplexClass};
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}
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return {DecodeFailure::DECODE_INVALIDREGISTERCLASS, FEXCore::IR::InvalidClass};
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}
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template<>
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std::pair<DecodeFailure, FEXCore::IR::TypeDefinition> Loader::DecodeValue(std::string &Arg) {
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uint8_t Size{}, Elements{1};
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int NumArgs = sscanf(Arg.c_str(), "i%hhdv%hhd", &Size, &Elements);
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if (NumArgs != 1 && NumArgs != 2) {
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return {DecodeFailure::DECODE_INVALID, {}};
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}
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return {DecodeFailure::DECODE_OKAY, FEXCore::IR::TypeDefinition::Create(Size / 8, Elements)};
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}
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template<>
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std::pair<DecodeFailure, FEXCore::IR::CondClassType> Loader::DecodeValue(std::string &Arg) {
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std::array<std::string, 14> CondNames = {
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"EQ",
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"NEQ",
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"UGE",
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"ULT",
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"MI",
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"PL",
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"VS",
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"VC",
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"UGT",
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"ULE",
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"SGE",
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"SLT",
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"SGT",
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"SLE",
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};
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for (size_t i = 0; i < CondNames.size(); ++i) {
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if (CondNames[i] == Arg) {
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return {DecodeFailure::DECODE_OKAY, CondClassType{static_cast<uint8_t>(i)}};
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}
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}
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return {DecodeFailure::DECODE_INVALID_CONDFLAG, {}};
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}
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template<>
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std::pair<DecodeFailure, OrderedNode*> Loader::DecodeValue(std::string &Arg) {
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if (Arg.at(0) != '%') return {DecodeFailure::DECODE_INVALIDCHAR, 0};
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// Strip off the type qualifier from the ssa value
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size_t ArgEnd = std::string::npos;
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std::string SSAName = trim(Arg);
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ArgEnd = SSAName.find_first_of(" ");
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if (ArgEnd != std::string::npos) {
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SSAName = SSAName.substr(0, ArgEnd);
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}
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// Forward declarations may make this not succed
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auto Op = SSANameMapper.find(SSAName);
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if (Op == SSANameMapper.end()) {
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return {DecodeFailure::DECODE_UNKNOWN_SSA, nullptr};
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}
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return {DecodeFailure::DECODE_OKAY, Op->second};
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}
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Loader::Loader(std::string const &Filename, std::string const &ConfigFilename) {
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Config.Init(ConfigFilename);
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std::fstream fp(Filename, std::fstream::binary | std::fstream::in);
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if (!fp.is_open()) {
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LogMan::Msg::E("Couldn't open IR file '%s'", Filename.c_str());
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return;
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}
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std::string TmpLine;
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while (!fp.eof()) {
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std::getline(fp, TmpLine);
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if (fp.eof()) {
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break;
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}
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if (fp.fail()) {
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LogMan::Msg::E("Failed to getline on line: %ld", Lines.size());
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return;
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}
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Lines.emplace_back(TmpLine);
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}
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ResetWorkingList();
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Loaded = Parse();
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}
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bool Loader::Parse() {
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auto CheckPrintError = [&](LineDefinition &Def, DecodeFailure Failure) -> bool {
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if (Failure != DecodeFailure::DECODE_OKAY) {
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LogMan::Msg::E("Error on Line: %d", Def.LineNumber);
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LogMan::Msg::E("%s", Lines[Def.LineNumber].c_str());
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LogMan::Msg::E("Value Couldn't be decoded due to %s", DecodeErrorToString(Failure).c_str());
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return false;
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}
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return true;
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};
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// String parse every line for our definitions
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for (size_t i = 0; i < Lines.size(); ++i) {
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std::string Line = Lines[i];
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LineDefinition Def{};
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CurrentDef = &Def;
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Def.LineNumber = i;
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Line = trim(Line);
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// Skip empty lines
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if (Line.empty()) {
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continue;
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}
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if (Line[0] == ';') {
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// This is a comment line
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// Skip it
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continue;
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}
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size_t CurrentPos{};
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// Let's see if this node is assigning something first
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if (Line[0] == '%') {
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size_t DefinitionEnd = std::string::npos;
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if ((DefinitionEnd = Line.find_first_of("=", CurrentPos)) != std::string::npos) {
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Def.Definition = Line.substr(0, DefinitionEnd);
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Def.Definition = trim(Def.Definition);
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Def.HasDefinition = true;
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CurrentPos = DefinitionEnd + 1; // +1 to ensure we go past then assignment
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}
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else {
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LogMan::Msg::E("Error on Line: %d", i);
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LogMan::Msg::E("%s", Lines[i].c_str());
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LogMan::Msg::E("SSA declaration without assignment");
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return false;
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}
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}
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// Check if we are pulling in some IR from the IR Printer
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// Prints (%ssa%d) at the start of lines without a definition
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if (Line[0] == '(') {
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size_t DefinitionEnd = std::string::npos;
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if ((DefinitionEnd = Line.find_first_of(")", CurrentPos)) != std::string::npos) {
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size_t SSAEnd = std::string::npos;
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if ((SSAEnd = Line.find_last_of(" ", DefinitionEnd)) != std::string::npos) {
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std::string Type = Line.substr(SSAEnd + 1, DefinitionEnd - SSAEnd - 1);
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Type = trim(Type);
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auto DefinitionSize = DecodeValue<FEXCore::IR::TypeDefinition>(Type);
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if (!CheckPrintError(Def, DefinitionSize.first)) return false;
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Def.Size = DefinitionSize.second;
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}
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Def.Definition = trim(Line.substr(1, std::min(DefinitionEnd, SSAEnd) - 1));
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CurrentPos = DefinitionEnd + 1;
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}
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else {
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LogMan::Msg::E("Error on Line: %d", i);
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LogMan::Msg::E("%s", Lines[i].c_str());
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LogMan::Msg::E("SSA value with numbered SSA provided but no closing parentheses");
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return false;
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}
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}
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if (Def.HasDefinition) {
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// Let's check if we have a size declared with this variable
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size_t NameEnd = std::string::npos;
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if ((NameEnd = Def.Definition.find_first_of(" ")) != std::string::npos) {
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std::string Type = Def.Definition.substr(NameEnd + 1);
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Type = trim(Type);
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Def.Definition = trim(Def.Definition.substr(0, NameEnd));
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auto DefinitionSize = DecodeValue<FEXCore::IR::TypeDefinition>(Type);
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if (!CheckPrintError(Def, DefinitionSize.first)) return false;
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Def.Size = DefinitionSize.second;
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}
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if (Def.Definition == "%Invalid") {
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LogMan::Msg::E("Error on Line: %d", i);
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LogMan::Msg::E("%s", Lines[i].c_str());
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LogMan::Msg::E("Definition tried to define reserved %Invalid ssa node");
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return false;
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}
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}
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// Let's get the IR op
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size_t OpNameEnd = std::string::npos;
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std::string RemainingLine = trim(Line.substr(CurrentPos));
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CurrentPos = 0;
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if ((OpNameEnd = RemainingLine.find_first_of(" \t\n\r\0", CurrentPos)) != std::string::npos) {
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Def.IROp = RemainingLine.substr(CurrentPos, OpNameEnd);
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Def.IROp = trim(Def.IROp);
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Def.HasArgs = true;
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CurrentPos = OpNameEnd;
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}
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else {
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if (RemainingLine.empty()) {
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LogMan::Msg::E("Error on Line: %d", i);
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LogMan::Msg::E("%s", Lines[i].c_str());
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LogMan::Msg::E("Line without an IROp?");
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return false;
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}
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Def.IROp = RemainingLine;
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Def.HasArgs = false;
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}
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if (Def.HasArgs) {
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RemainingLine = trim(RemainingLine.substr(CurrentPos));
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CurrentPos = 0;
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if (RemainingLine.empty()) {
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// How did we get here?
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Def.HasArgs = false;
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}
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else {
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while (!RemainingLine.empty()) {
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size_t ArgEnd = std::string::npos;
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ArgEnd = RemainingLine.find_first_of(",");
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std::string Arg = RemainingLine.substr(0, ArgEnd);
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Arg = trim(Arg);
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Def.Args.emplace_back(Arg);
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RemainingLine.erase(0, ArgEnd+1); // +1 to ensure we go past the ','
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if (ArgEnd == std::string::npos)
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break;
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}
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}
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}
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Defs.emplace_back(Def);
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}
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// Ensure all of the ops are real ops
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for(size_t i = 0; i < Defs.size(); ++i) {
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auto &Def = Defs[i];
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auto Op = NameToOpMap.find(Def.IROp);
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if (Op == NameToOpMap.end()) {
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LogMan::Msg::E("Error on Line: %d", Def.LineNumber);
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LogMan::Msg::E("%s", Lines[Def.LineNumber].c_str());
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LogMan::Msg::E("IROp '%s' doesn't exist", Def.IROp.c_str());
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return false;
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}
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Def.OpEnum = Op->second;
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}
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// Emit the header op
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IRPair<IROp_IRHeader> IRHeader;
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{
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auto &Def = Defs[0];
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CurrentDef = &Def;
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if (Def.OpEnum != FEXCore::IR::IROps::OP_IRHEADER) {
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LogMan::Msg::E("Error on Line: %d", Def.LineNumber);
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LogMan::Msg::E("%s", Lines[Def.LineNumber].c_str());
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LogMan::Msg::E("First op needs to be IRHeader. Was '%s'", Def.IROp.c_str());
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return false;
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}
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auto Entry = DecodeValue<uint64_t>(Def.Args[0]);
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auto CodeBlockCount = DecodeValue<uint64_t>(Def.Args[2]);
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if (!CheckPrintError(Def, Entry.first)) return false;
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if (!CheckPrintError(Def, CodeBlockCount.first)) return false;
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EntryRIP = Entry.second;
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IRHeader = _IRHeader(InvalidNode, Entry.second, CodeBlockCount.second, false);
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}
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// Spin through the blocks and generate basic block ops
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IRPair<IROp_CodeBlock> PrevBlock{};
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for(size_t i = 0; i < Defs.size(); ++i) {
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auto &Def = Defs[i];
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if (Def.OpEnum == FEXCore::IR::IROps::OP_CODEBLOCK) {
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auto CodeBlock = _CodeBlock(InvalidNode, InvalidNode, InvalidNode);
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if (PrevBlock.first) {
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PrevBlock.first->Next = CodeBlock.Node->Wrapped(ListData.Begin());
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}
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PrevBlock = CodeBlock;
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SSANameMapper[Def.Definition] = CodeBlock.Node;
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Def.Node = CodeBlock.Node;
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if (i == 1) {
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// First code block is the entry block
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// Link the header to the first block
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IRHeader.first->Blocks = CodeBlock.Node->Wrapped(ListData.Begin());
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}
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}
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}
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// Spin through all the definitions and add the ops to the basic blocks
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OrderedNode *CurrentBlock{};
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FEXCore::IR::IROp_CodeBlock *CurrentBlockOp{};
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for(size_t i = 1; i < Defs.size(); ++i) {
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auto &Def = Defs[i];
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CurrentDef = &Def;
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if (Def.OpEnum == FEXCore::IR::IROps::OP_CODEBLOCK) {
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auto DefTarget = SSANameMapper.find(Def.Definition);
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if (CurrentBlock != nullptr) {
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LogMan::Msg::E("Error on Line: %d", Def.LineNumber);
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LogMan::Msg::E("%s", Lines[Def.LineNumber].c_str());
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LogMan::Msg::E("CodeBlock being used inside of already existing codeblock!");
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return false;
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}
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CurrentBlock = DefTarget->second;
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CurrentBlockOp = CurrentBlock->Op(Data.Begin())->CW<FEXCore::IR::IROp_CodeBlock>();
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SetWriteCursor(CurrentBlock);
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}
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if (Def.OpEnum == FEXCore::IR::IROps::OP_ENDBLOCK) {
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if (CurrentBlock == nullptr) {
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LogMan::Msg::E("Error on Line: %d", Def.LineNumber);
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LogMan::Msg::E("%s", Lines[Def.LineNumber].c_str());
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LogMan::Msg::E("EndBlock being used outside of a block!");
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return false;
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}
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auto Adjust = DecodeValue<uint64_t>(Def.Args[0]);
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if (!CheckPrintError(Def, Adjust.first)) return false;
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Def.Node = _EndBlock(Adjust.second);
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CurrentBlockOp->Last = Def.Node->Wrapped(ListData.Begin());
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CurrentBlock = nullptr;
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CurrentBlockOp = nullptr;
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}
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if (Def.OpEnum == FEXCore::IR::IROps::OP_DUMMY) {
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auto &PrevDef = Defs[i - 1];
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if (PrevDef.OpEnum != FEXCore::IR::IROps::OP_CODEBLOCK) {
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LogMan::Msg::E("Error on Line: %d", Def.LineNumber);
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LogMan::Msg::E("%s", Lines[Def.LineNumber].c_str());
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LogMan::Msg::E("Dummy op must be first op in block");
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return false;
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}
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Def.Node = _Dummy();
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CurrentBlockOp->Begin = Def.Node->Wrapped(ListData.Begin());
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SSANameMapper[Def.Definition] = Def.Node;
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}
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switch (Def.OpEnum) {
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// Special handled
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case FEXCore::IR::IROps::OP_IRHEADER:
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case FEXCore::IR::IROps::OP_CODEBLOCK:
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case FEXCore::IR::IROps::OP_ENDBLOCK:
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case FEXCore::IR::IROps::OP_DUMMY:
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break;
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#define IROP_PARSER_SWITCH_HELPERS
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#include <FEXCore/IR/IRDefines.inc>
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default: {
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LogMan::Msg::E("Error on Line: %d", Def.LineNumber);
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LogMan::Msg::E("%s", Lines[Def.LineNumber].c_str());
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LogMan::Msg::E("Unhandled Op enum '%s' in parser", Def.IROp.c_str());
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return false;
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break;
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}
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}
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if (Def.HasDefinition) {
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auto IROp = Def.Node->Op(Data.Begin());
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if (Def.Size.Elements()) {
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IROp->Size = Def.Size.Bytes() * Def.Size.Elements();
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IROp->ElementSize = Def.Size.Bytes();
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}
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else {
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IROp->Size = Def.Size.Bytes();
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IROp->ElementSize = 0;
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}
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SSANameMapper[Def.Definition] = Def.Node;
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}
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}
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std::stringstream out;
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auto NewIR = ViewIR();
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FEXCore::IR::Dump(&out, &NewIR, nullptr);
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printf("IR:\n%s\n@@@@@\n", out.str().c_str());
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|
|
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return true;
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|
}
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|
|
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void InitializeStaticTables() {
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|
for (FEXCore::IR::IROps Op = FEXCore::IR::IROps::OP_DUMMY;
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|
Op <= FEXCore::IR::IROps::OP_LAST;
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|
Op = static_cast<FEXCore::IR::IROps>(static_cast<uint32_t>(Op) + 1)) {
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|
NameToOpMap[FEXCore::IR::GetName(Op)] = Op;
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|
}
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|
}
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|
}
|