mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-07 12:00:17 +02:00
This allows for running x86 applications under wine without having to run all of wine under FEX. The JIT is invoked when running application code and then left when handling NT syscalls or unix calls to e.g. the Vulkan driver.
390 lines
14 KiB
C++
390 lines
14 KiB
C++
/*
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$info$
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tags: Bin|WOW64
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desc: Implements the WOW64 BT module API using FEXCore
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$end_info$
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*/
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// Thanks to André Zwing, whose ideas from https://github.com/AndreRH/hangover this code is based upon
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#include <FEXCore/fextl/fmt.h>
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#include <FEXCore/Core/X86Enums.h>
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#include <FEXCore/Core/SignalDelegator.h>
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#include <FEXCore/Core/Context.h>
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#include <FEXCore/Core/CoreState.h>
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#include <FEXCore/Debug/InternalThreadState.h>
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#include <FEXCore/HLE/SyscallHandler.h>
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#include <FEXCore/Config/Config.h>
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#include <FEXCore/Utils/Allocator.h>
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#include <FEXCore/Utils/LogManager.h>
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#include <FEXCore/Utils/Threads.h>
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#include <FEXCore/Utils/EnumOperators.h>
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#include <FEXCore/Utils/EnumUtils.h>
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#include <FEXCore/Utils/FPState.h>
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#include <FEXCore/Utils/ArchHelpers/Arm64.h>
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#include <FEXHeaderUtils/TypeDefines.h>
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#include "Common/Config.h"
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#include "DummyHandlers.h"
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#include "BTInterface.h"
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#include <cstdint>
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#include <type_traits>
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#include <atomic>
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#include <mutex>
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#include <utility>
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#include <ntstatus.h>
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#include <windef.h>
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#include <winternl.h>
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#include <wine/debug.h>
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#include <wine/unixlib.h>
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struct TLS {
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enum class Slot : size_t {
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ENTRY_CONTEXT = WOW64_TLS_MAX_NUMBER,
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THREAD_STATE = WOW64_TLS_MAX_NUMBER - 2,
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};
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_TEB *TEB;
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explicit TLS(_TEB *TEB) : TEB(TEB) {}
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CONTEXT *&EntryContext() const {
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return reinterpret_cast<CONTEXT *&>(TEB->TlsSlots[FEXCore::ToUnderlying(Slot::ENTRY_CONTEXT)]);
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}
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FEXCore::Core::InternalThreadState *&ThreadState() const {
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return reinterpret_cast<FEXCore::Core::InternalThreadState *&>(TEB->TlsSlots[FEXCore::ToUnderlying(Slot::THREAD_STATE)]);
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}
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};
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class WowSyscallHandler;
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namespace {
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namespace BridgeInstrs {
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uint16_t Syscall{0x2ecd};
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uint16_t UnixCall{0x2ecd};
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}
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fextl::unique_ptr<FEXCore::Context::Context> CTX;
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fextl::unique_ptr<FEX::DummyHandlers::DummySignalDelegator> SignalDelegator;
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fextl::unique_ptr<WowSyscallHandler> SyscallHandler;
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std::pair<NTSTATUS, TLS> GetThreadTLS(HANDLE Thread) {
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THREAD_BASIC_INFORMATION Info;
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const NTSTATUS Err = NtQueryInformationThread(Thread, ThreadBasicInformation, &Info, sizeof(Info), nullptr);
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return {Err, TLS{reinterpret_cast<_TEB *>(Info.TebBaseAddress)}};
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}
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TLS GetTLS() {
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return TLS{NtCurrentTeb()};
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}
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uint64_t GetWowTEB(void *TEB) {
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static constexpr size_t WowTEBOffsetMemberOffset{0x180c};
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return static_cast<uint64_t>(*reinterpret_cast<LONG *>(reinterpret_cast<uintptr_t>(TEB) + WowTEBOffsetMemberOffset)
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+ reinterpret_cast<uint64_t>(TEB));
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}
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bool IsAddressInJit(uint64_t Address) {
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return GetTLS().ThreadState()->CPUBackend->IsAddressInCodeBuffer(Address);
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}
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}
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namespace Context {
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void LoadStateFromWowContext(FEXCore::Core::InternalThreadState *Thread, uint64_t WowTEB, WOW64_CONTEXT *Context) {
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auto &State = Thread->CurrentFrame->State;
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// General register state
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State.gregs[FEXCore::X86State::REG_RAX] = Context->Eax;
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State.gregs[FEXCore::X86State::REG_RBX] = Context->Ebx;
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State.gregs[FEXCore::X86State::REG_RCX] = Context->Ecx;
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State.gregs[FEXCore::X86State::REG_RDX] = Context->Edx;
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State.gregs[FEXCore::X86State::REG_RSI] = Context->Esi;
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State.gregs[FEXCore::X86State::REG_RDI] = Context->Edi;
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State.gregs[FEXCore::X86State::REG_RBP] = Context->Ebp;
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State.gregs[FEXCore::X86State::REG_RSP] = Context->Esp;
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State.rip = Context->Eip;
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CTX->SetFlagsFromCompactedEFLAGS(Thread, Context->EFlags);
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State.es_idx = Context->SegEs & 0xffff;
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State.cs_idx = Context->SegCs & 0xffff;
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State.ss_idx = Context->SegSs & 0xffff;
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State.ds_idx = Context->SegDs & 0xffff;
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State.fs_idx = Context->SegFs & 0xffff;
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State.gs_idx = Context->SegGs & 0xffff;
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// The TEB is the only populated GDT entry by default
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State.gdt[(Context->SegFs & 0xffff) >> 3].base = WowTEB;
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State.fs_cached = WowTEB;
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State.es_cached = 0;
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State.cs_cached = 0;
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State.ss_cached = 0;
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State.ds_cached = 0;
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// Floating-point register state
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const auto *XSave = reinterpret_cast<XSAVE_FORMAT*>(Context->ExtendedRegisters);
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memcpy(State.xmm.sse.data, XSave->XmmRegisters, sizeof(State.xmm.sse.data));
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memcpy(State.mm, XSave->FloatRegisters, sizeof(State.mm));
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State.FCW = XSave->ControlWord;
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State.flags[FEXCore::X86State::X87FLAG_C0_LOC] = (XSave->StatusWord >> 8) & 1;
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State.flags[FEXCore::X86State::X87FLAG_C1_LOC] = (XSave->StatusWord >> 9) & 1;
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State.flags[FEXCore::X86State::X87FLAG_C2_LOC] = (XSave->StatusWord >> 10) & 1;
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State.flags[FEXCore::X86State::X87FLAG_C3_LOC] = (XSave->StatusWord >> 14) & 1;
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State.flags[FEXCore::X86State::X87FLAG_TOP_LOC] = (XSave->StatusWord >> 11) & 0b111;
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State.AbridgedFTW = XSave->TagWord;
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}
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void StoreWowContextFromState(FEXCore::Core::InternalThreadState *Thread, WOW64_CONTEXT *Context) {
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auto &State = Thread->CurrentFrame->State;
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// General register state
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Context->Eax = State.gregs[FEXCore::X86State::REG_RAX];
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Context->Ebx = State.gregs[FEXCore::X86State::REG_RBX];
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Context->Ecx = State.gregs[FEXCore::X86State::REG_RCX];
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Context->Edx = State.gregs[FEXCore::X86State::REG_RDX];
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Context->Esi = State.gregs[FEXCore::X86State::REG_RSI];
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Context->Edi = State.gregs[FEXCore::X86State::REG_RDI];
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Context->Ebp = State.gregs[FEXCore::X86State::REG_RBP];
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Context->Esp = State.gregs[FEXCore::X86State::REG_RSP];
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Context->Eip = State.rip;
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Context->EFlags = CTX->ReconstructCompactedEFLAGS(Thread);
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Context->SegEs = State.es_idx;
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Context->SegCs = State.cs_idx;
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Context->SegSs = State.ss_idx;
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Context->SegDs = State.ds_idx;
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Context->SegFs = State.fs_idx;
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Context->SegGs = State.gs_idx;
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// Floating-point register state
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auto *XSave = reinterpret_cast<XSAVE_FORMAT*>(Context->ExtendedRegisters);
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memcpy(XSave->XmmRegisters, State.xmm.sse.data, sizeof(State.xmm.sse.data));
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memcpy(XSave->FloatRegisters, State.mm, sizeof(State.mm));
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XSave->ControlWord = State.FCW;
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XSave->StatusWord =
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(State.flags[FEXCore::X86State::X87FLAG_TOP_LOC] << 11) |
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(State.flags[FEXCore::X86State::X87FLAG_C0_LOC] << 8) |
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(State.flags[FEXCore::X86State::X87FLAG_C1_LOC] << 9) |
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(State.flags[FEXCore::X86State::X87FLAG_C2_LOC] << 10) |
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(State.flags[FEXCore::X86State::X87FLAG_C3_LOC] << 14);
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XSave->TagWord = State.AbridgedFTW;
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Context->FloatSave.ControlWord = State.FCW;
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Context->FloatSave.StatusWord = XSave->StatusWord;
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Context->FloatSave.TagWord = FEXCore::FPState::ConvertFromAbridgedFTW(XSave->StatusWord, State.mm, XSave->TagWord);
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Context->FloatSave.ErrorOffset = XSave->ErrorOffset;
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Context->FloatSave.ErrorSelector = XSave->ErrorSelector | (XSave->ErrorOpcode << 16);
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Context->FloatSave.DataOffset = XSave->DataOffset;
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Context->FloatSave.DataSelector = XSave->DataSelector;
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Context->FloatSave.Cr0NpxState = XSave->StatusWord | 0xffff0000;
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}
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NTSTATUS FlushThreadStateContext(HANDLE Thread) {
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const auto [Err, TLS] = GetThreadTLS(Thread);
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if (Err) {
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return Err;
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}
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WOW64_CONTEXT TmpWowContext{
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.ContextFlags = WOW64_CONTEXT_FULL | WOW64_CONTEXT_EXTENDED_REGISTERS
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};
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Context::StoreWowContextFromState(TLS.ThreadState(), &TmpWowContext);
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return RtlWow64SetThreadContext(Thread, &TmpWowContext);
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}
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}
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namespace Logging {
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void MsgHandler(LogMan::DebugLevels Level, char const *Message) {
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const auto Output = fextl::fmt::format("[{}][{:X}] {}\n", LogMan::DebugLevelStr(Level), GetCurrentThreadId(), Message);
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__wine_dbg_output(Output.c_str());
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}
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void AssertHandler(char const *Message) {
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const auto Output = fextl::fmt::format("[ASSERT] {}\n", Message);
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__wine_dbg_output(Output.c_str());
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}
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void Init() {
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LogMan::Throw::InstallHandler(AssertHandler);
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LogMan::Msg::InstallHandler(MsgHandler);
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}
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}
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class WowSyscallHandler : public FEXCore::HLE::SyscallHandler, public FEXCore::Allocator::FEXAllocOperators {
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public:
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WowSyscallHandler() {
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OSABI = FEXCore::HLE::SyscallOSABI::OS_WIN32;
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}
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uint64_t HandleSyscall(FEXCore::Core::CpuStateFrame *Frame, FEXCore::HLE::SyscallArguments *Args) override {
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const uint64_t ReturnRIP = *(uint32_t *)(Frame->State.gregs[FEXCore::X86State::REG_RSP]); // Return address from the stack
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uint64_t ReturnRSP = Frame->State.gregs[FEXCore::X86State::REG_RSP] + 4; // Stack pointer after popping return address
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uint64_t ReturnRAX = 0;
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// APCs/User Callbacks end up calling into the JIT from Wow64SystemService, and since the FEX return stack pointer
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// is stored in TLS, the reentrant call ends up overwriting the callers stored return stack location. Stash it here
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// to avoid that breaking returns used in thread suspend
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const auto StashedStackLocation = Frame->ReturningStackLocation;
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if (Frame->State.rip == (uint64_t)&BridgeInstrs::UnixCall) {
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struct StackLayout {
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unixlib_handle_t Handle;
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UINT32 ID;
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ULONG32 Args;
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} *StackArgs = reinterpret_cast<StackLayout *>(ReturnRSP);
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ReturnRSP += sizeof(StackLayout);
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// Skip unlocking the JIT context here since the atomic accesses hurt unix call perfomance quite badly
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// NOTE: this will break suspension if there are any infinitely-blocking unix calls
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ReturnRAX = static_cast<uint64_t>(__wine_unix_call(StackArgs->Handle, StackArgs->ID, ULongToPtr(StackArgs->Args)));
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} else if (Frame->State.rip == (uint64_t)&BridgeInstrs::Syscall) {
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const uint64_t EntryRAX = Frame->State.gregs[FEXCore::X86State::REG_RAX];
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ReturnRAX = static_cast<uint64_t>(Wow64SystemServiceEx(static_cast<UINT>(EntryRAX),
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reinterpret_cast<UINT *>(ReturnRSP + 4)));
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}
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// If a new context has been set, use it directly and don't return to the syscall caller
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if (Frame->State.rip == (uint64_t)&BridgeInstrs::Syscall ||
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Frame->State.rip == (uint64_t)&BridgeInstrs::UnixCall) {
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Frame->State.gregs[FEXCore::X86State::REG_RAX] = ReturnRAX;
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Frame->State.gregs[FEXCore::X86State::REG_RSP] = ReturnRSP;
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Frame->State.rip = ReturnRIP;
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}
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Frame->ReturningStackLocation = StashedStackLocation;
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// NORETURNEDRESULT causes this result to be ignored since we restore all registers back from memory after a syscall anyway
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return 0;
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}
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FEXCore::HLE::SyscallABI GetSyscallABI(uint64_t Syscall) override {
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return { .NumArgs = 0, .HasReturn = false, .HostSyscallNumber = -1 };
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}
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FEXCore::HLE::AOTIRCacheEntryLookupResult LookupAOTIRCacheEntry(FEXCore::Core::InternalThreadState *Thread, uint64_t GuestAddr) override {
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return {0, 0};
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}
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};
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void BTCpuProcessInit() {
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Logging::Init();
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FEX::Config::InitializeConfigs();
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FEXCore::Config::Initialize();
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FEXCore::Config::AddLayer(FEX::Config::CreateGlobalMainLayer());
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FEXCore::Config::AddLayer(FEX::Config::CreateMainLayer());
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FEXCore::Config::Load();
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FEXCore::Config::ReloadMetaLayer();
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FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_IS_INTERPRETER, "0");
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FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_INTERPRETER_INSTALLED, "0");
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FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_IS64BIT_MODE, "0");
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// Not applicable to Windows
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FEXCore::Config::EraseSet(FEXCore::Config::ConfigOption::CONFIG_TSOAUTOMIGRATION, "0");
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FEXCore::Context::InitializeStaticTables(FEXCore::Context::MODE_32BIT);
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SignalDelegator = fextl::make_unique<FEX::DummyHandlers::DummySignalDelegator>();
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SyscallHandler = fextl::make_unique<WowSyscallHandler>();
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CTX = FEXCore::Context::Context::CreateNewContext();
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CTX->InitializeContext();
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CTX->SetSignalDelegator(SignalDelegator.get());
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CTX->SetSyscallHandler(SyscallHandler.get());
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CTX->InitCore(0, 0);
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}
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NTSTATUS BTCpuThreadInit() {
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GetTLS().ThreadState() = CTX->CreateThread(nullptr, 0);
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return STATUS_SUCCESS;
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}
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NTSTATUS BTCpuThreadTerm(HANDLE Thread) {
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const auto [Err, TLS] = GetThreadTLS(Thread);
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if (Err) {
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return Err;
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}
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CTX->DestroyThread(TLS.ThreadState());
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return STATUS_SUCCESS;
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}
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void *BTCpuGetBopCode() {
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return &BridgeInstrs::Syscall;
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}
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void *__wine_get_unix_opcode() {
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return &BridgeInstrs::UnixCall;
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}
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NTSTATUS BTCpuGetContext(HANDLE Thread, HANDLE Process, void *Unknown, WOW64_CONTEXT *Context) {
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auto [Err, TLS] = GetThreadTLS(Thread);
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if (Err) {
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return Err;
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}
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if (Err = Context::FlushThreadStateContext(Thread); Err) {
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return Err;
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}
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return RtlWow64GetThreadContext(Thread, Context);
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}
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NTSTATUS BTCpuSetContext(HANDLE Thread, HANDLE Process, void *Unknown, WOW64_CONTEXT *Context) {
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auto [Err, TLS] = GetThreadTLS(Thread);
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if (Err) {
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return Err;
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}
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// Back-up the input context incase we've been passed the CPU area (the flush below would wipe it out otherwise)
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WOW64_CONTEXT TmpContext = *Context;
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if (Err = Context::FlushThreadStateContext(Thread); Err) {
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return Err;
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}
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// Merge the input context into the CPU area then pass the full context into the JIT
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if (Err = RtlWow64SetThreadContext(Thread, &TmpContext); Err) {
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return Err;
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}
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TmpContext.ContextFlags = WOW64_CONTEXT_FULL | WOW64_CONTEXT_EXTENDED_REGISTERS;
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if (Err = RtlWow64GetThreadContext(Thread, &TmpContext); Err) {
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return Err;
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}
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Context::LoadStateFromWowContext(TLS.ThreadState(), GetWowTEB(TLS.TEB), &TmpContext);
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return STATUS_SUCCESS;
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}
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void BTCpuSimulate() {
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CONTEXT entry_context;
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RtlCaptureContext(&entry_context);
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// APC handling calls BTCpuSimulate from syscalls and then use NtContinue to return to the previous context,
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// to avoid the saved context being clobbered in this case only save the entry context highest in the stack
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if (!GetTLS().EntryContext() || GetTLS().EntryContext()->Sp <= entry_context.Sp) {
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GetTLS().EntryContext() = &entry_context;
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}
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while (1) {
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Context::LockJITContext();
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CTX->ExecuteThread(GetTLS().ThreadState());
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Context::UnlockJITContext();
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}
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}
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