Ryan Houdek 28fa0bda31 Arm64: Fixes inline syscalls ...

Ever since we reordered registers in `X86Enums.h` this has silently been
broken. This wasn't hit because RCLSE has been broken ever since SRA was
added, so inlinesyscalls just weren't ever happening.

Quick fix while I think of a way to more strictly correlate these
registers so it doesn't happen again.

2023-09-23 02:56:32 -07:00

..

Config

FEXCore: Removes vestigial Interpreter code

2023-09-21 15:49:49 -07:00

Context

Context: Add an alternative thread-oriented execute function

2023-09-22 10:12:40 -07:00

Core

Arm64: Fixes inline syscalls

2023-09-23 02:56:32 -07:00

GDBJIT

FEXCore/Interface/GDBJIT: Adds SPDX identifier

2023-09-19 17:33:15 -07:00

HLE/Thunks

FEXCore/Interface/Thunks: Adds SPDX identifier

2023-09-19 17:33:14 -07:00

IR

IR: Add bit masking selects

2023-09-22 19:07:42 -04:00