mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-16 08:00:43 +02:00
Billy Laws
de63fd05d0
This takes a similar approach to deferred signal handling and allows any given thread to be interrupted while running JIT code by protecting the appropriate page as RO. When the thread then enters a new block, it will try to acccess that page and segfault. This is safer than just sending a signal to the thread as that could stop in a place where JIT context couldn't be recovered correctly.
132 lines
4.1 KiB
C++
132 lines
4.1 KiB
C++
#pragma once
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#include <FEXCore/Core/Context.h>
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#include <FEXCore/Core/CoreState.h>
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#include <FEXCore/Core/CPUBackend.h>
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#include <FEXCore/Core/SignalDelegator.h>
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#include <FEXCore/IR/IntrusiveIRList.h>
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#include <FEXCore/IR/RegisterAllocationData.h>
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#include <FEXCore/Utils/Event.h>
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#include <FEXCore/Utils/InterruptableConditionVariable.h>
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#include <FEXCore/Utils/Threads.h>
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#include <FEXCore/fextl/memory.h>
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#include <FEXCore/fextl/robin_map.h>
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#include <FEXCore/fextl/vector.h>
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#include <FEXHeaderUtils/TypeDefines.h>
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#include <shared_mutex>
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#include <type_traits>
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namespace FEXCore {
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class LookupCache;
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class CompileService;
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}
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namespace FEXCore::Context {
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class Context;
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}
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namespace FEXCore::CPU {
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union Relocation;
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}
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namespace FEXCore::Frontend {
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class Decoder;
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}
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namespace FEXCore::IR{
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class OpDispatchBuilder;
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class PassManager;
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}
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namespace FEXCore::Core {
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struct DebugDataSubblock {
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uint32_t HostCodeOffset;
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uint32_t HostCodeSize;
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};
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struct DebugDataGuestOpcode {
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uint64_t GuestEntryOffset;
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ptrdiff_t HostEntryOffset;
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};
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/**
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* @brief Contains debug data for a block of code for later debugger analysis
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*
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* Needs to remain around for as long as the code could be executed at least
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*/
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struct DebugData : public FEXCore::Allocator::FEXAllocOperators {
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uint64_t HostCodeSize; ///< The size of the code generated in the host JIT
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fextl::vector<DebugDataSubblock> Subblocks;
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fextl::vector<DebugDataGuestOpcode> GuestOpcodes;
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fextl::vector<FEXCore::CPU::Relocation> *Relocations;
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};
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struct LocalIREntry {
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uint64_t StartAddr;
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uint64_t Length;
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fextl::unique_ptr<FEXCore::IR::IRListView, FEXCore::IR::IRListViewDeleter> IR;
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FEXCore::IR::RegisterAllocationData::UniquePtr RAData;
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fextl::unique_ptr<FEXCore::Core::DebugData> DebugData;
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};
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struct InternalThreadState : public FEXCore::Allocator::FEXAllocOperators {
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FEXCore::Core::CpuStateFrame* const CurrentFrame = &BaseFrameState;
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struct {
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std::atomic_bool Running {false};
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std::atomic_bool WaitingToStart {true};
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std::atomic_bool EarlyExit {false};
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std::atomic_bool ThreadSleeping {false};
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} RunningEvents;
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FEXCore::Context::Context *CTX;
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std::atomic<SignalEvent> SignalReason{SignalEvent::Nothing};
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fextl::unique_ptr<FEXCore::Threads::Thread> ExecutionThread;
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bool StartPaused {false};
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InterruptableConditionVariable StartRunning;
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Event ThreadWaiting;
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fextl::unique_ptr<FEXCore::IR::OpDispatchBuilder> OpDispatcher;
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fextl::unique_ptr<FEXCore::CPU::CPUBackend> CPUBackend;
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fextl::unique_ptr<FEXCore::LookupCache> LookupCache;
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fextl::robin_map<uint64_t, LocalIREntry> DebugStore;
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fextl::unique_ptr<FEXCore::Frontend::Decoder> FrontendDecoder;
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fextl::unique_ptr<FEXCore::IR::PassManager> PassManager;
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FEXCore::HLE::ThreadManagement ThreadManager;
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int StatusCode{};
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FEXCore::Context::ExitReason ExitReason {FEXCore::Context::ExitReason::EXIT_WAITING};
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std::shared_ptr<FEXCore::CompileService> CompileService;
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std::shared_mutex ObjectCacheRefCounter{};
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bool DestroyedByParent{false}; // Should the parent destroy this thread, or it destory itself
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struct DeferredSignalState {
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#ifndef _WIN32
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siginfo_t Info;
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#endif
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int Signal;
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};
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// Queue of thread local signal frames that have been deferred.
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// Async signals aren't guaranteed to be delivered in any particular order, but FEX treats them as FILO.
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fextl::vector<DeferredSignalState> DeferredSignalFrames;
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// BaseFrameState should always be at the end, directly before the interrupt fault page
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alignas(16) FEXCore::Core::CpuStateFrame BaseFrameState{};
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// Can be reprotected as RO to trigger an interrupt at generated code block entrypoints
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alignas(FHU::FEX_PAGE_SIZE) uint8_t InterruptFaultPage[FHU::FEX_PAGE_SIZE];
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};
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static_assert((offsetof(FEXCore::Core::InternalThreadState, InterruptFaultPage) -
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offsetof(FEXCore::Core::InternalThreadState, BaseFrameState)) < 4096,
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"Fault page is outside of immediate range from CPU state");
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// static_assert(std::is_standard_layout<InternalThreadState>::value, "This needs to be standard layout");
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}
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