Alyssa Rosenzweig 1ad928dc2c IR: Add special NZCV "flag" ...

Reserve 4 bytes of "flags" to model the 32-bit arm64 NZCV register, so
we can start porting FEX's flag handling code over to using NZCV without
needing the whole compiler to be aware of instructions that might
clobber host flags.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

2023-08-02 12:38:00 -04:00

..

FEXCore

IR: Add special NZCV "flag"

2023-08-02 12:38:00 -04:00

git_version.h.in

Puts the FEX describe tag in CPUID

2021-01-27 07:20:14 -08:00