mirror of
https://github.com/FEX-Emu/FEX.git
synced 2026-10-06 12:00:17 +02:00
Ryan Houdek
199cfd76d8
I had to change how blocks are represented to make it easier to parse This required a fairly substantial refactor that makes it so blocks are represented differently and we can walk them sequentially. This will make future analysis easier to deal with. Had to rewrite the passes and core's parsing of the IR afterwards. Moved RA in to a optimization pass to be shared between the JIT backends This works because x86-64 and AArch64 RA can be identical. Still doesn't support PHI nodes or spilling correctly, this is the first step in the process of getting there.
120 lines
4.1 KiB
C++
120 lines
4.1 KiB
C++
#pragma once
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#include "Event.h"
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#include "Interface/Core/CPUID.h"
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#include "Interface/Core/Frontend.h"
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#include "Interface/Core/InternalThreadState.h"
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#include "Interface/HLE/Syscalls.h"
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#include "Interface/Memory/MemMapper.h"
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#include "Interface/IR/PassManager.h"
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#include <FEXCore/Config/Config.h>
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#include <FEXCore/Core/CPUBackend.h>
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#include <stdint.h>
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#include <mutex>
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namespace FEXCore {
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class SyscallHandler;
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namespace CPU {
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class JITCore;
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}
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}
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namespace FEXCore::IR {
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class RegisterAllocationPass;
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}
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namespace FEXCore::Context {
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enum CoreRunningMode {
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MODE_RUN,
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MODE_SINGLESTEP,
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};
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struct Context {
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friend class FEXCore::SyscallHandler;
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friend class FEXCore::CPU::JITCore;
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struct {
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bool Multiblock {false};
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bool BreakOnFrontendFailure {true};
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int64_t MaxInstPerBlock {-1LL};
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uint64_t VirtualMemSize {1ULL << 36};
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FEXCore::Config::ConfigCore Core {FEXCore::Config::CONFIG_INTERPRETER};
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// LLVM JIT options
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bool LLVM_MemoryValidation {false};
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bool LLVM_IRValidation {false};
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bool LLVM_PrinterPass {false};
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} Config;
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FEXCore::Memory::MemMapper MemoryMapper;
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std::mutex ThreadCreationMutex;
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uint64_t ThreadID{};
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FEXCore::Core::InternalThreadState* ParentThread;
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std::vector<FEXCore::Core::InternalThreadState*> Threads;
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std::atomic_bool ShouldStop{};
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Event PauseWait;
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bool Running{};
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CoreRunningMode RunningMode {CoreRunningMode::MODE_RUN};
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FEXCore::Frontend::Decoder FrontendDecoder;
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FEXCore::IR::PassManager PassManager;
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FEXCore::CPUIDEmu CPUID;
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FEXCore::SyscallHandler SyscallHandler;
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CustomCPUFactoryType CustomCPUFactory;
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CustomCPUFactoryType FallbackCPUFactory;
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Context();
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~Context();
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bool InitCore(FEXCore::CodeLoader *Loader);
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FEXCore::Context::ExitReason RunLoop(bool WaitForIdle);
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bool IsPaused() const { return !Running; }
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void Pause();
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// Debugger interface
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void CompileRIP(FEXCore::Core::InternalThreadState *Thread, uint64_t RIP);
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uint64_t GetThreadCount() const;
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FEXCore::Core::RuntimeStats *GetRuntimeStatsForThread(uint64_t Thread);
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FEXCore::Core::CPUState GetCPUState();
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void GetMemoryRegions(std::vector<FEXCore::Memory::MemRegion> *Regions);
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bool GetDebugDataForRIP(uint64_t RIP, FEXCore::Core::DebugData *Data);
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bool FindHostCodeForRIP(uint64_t RIP, uint8_t **Code);
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// XXX:
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// bool FindIRForRIP(uint64_t RIP, FEXCore::IR::IntrusiveIRList **ir);
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// void SetIRForRIP(uint64_t RIP, FEXCore::IR::IntrusiveIRList *const ir);
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FEXCore::Core::ThreadState *GetThreadState();
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void LoadEntryList();
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uintptr_t CompileBlock(FEXCore::Core::InternalThreadState *Thread, uint64_t GuestRIP);
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uintptr_t CompileFallbackBlock(FEXCore::Core::InternalThreadState *Thread, uint64_t GuestRIP);
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protected:
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IR::RegisterAllocationPass *GetRegisterAllocatorPass();
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private:
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void WaitForIdle();
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FEXCore::Core::InternalThreadState* CreateThread(FEXCore::Core::CPUState *NewThreadState, uint64_t ParentTID, uint64_t ChildTID);
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void *MapRegion(FEXCore::Core::InternalThreadState *Thread, uint64_t Offset, uint64_t Size, bool Fixed = false);
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void *ShmBase();
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void MirrorRegion(FEXCore::Core::InternalThreadState *Thread, void *HostPtr, uint64_t Offset, uint64_t Size);
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void CopyMemoryMapping(FEXCore::Core::InternalThreadState *ParentThread, FEXCore::Core::InternalThreadState *ChildThread);
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void InitializeThread(FEXCore::Core::InternalThreadState *Thread);
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void ExecutionThread(FEXCore::Core::InternalThreadState *Thread);
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void RunThread(FEXCore::Core::InternalThreadState *Thread);
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uintptr_t AddBlockMapping(FEXCore::Core::InternalThreadState *Thread, uint64_t Address, void *Ptr);
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FEXCore::CodeLoader *LocalLoader{};
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// Entry Cache
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bool GetFilenameHash(std::string const &Filename, std::string &Hash);
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void AddThreadRIPsToEntryList(FEXCore::Core::InternalThreadState *Thread);
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void SaveEntryList();
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std::set<uint64_t> EntryList;
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std::vector<uint64_t> InitLocations;
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uint64_t StartingRIP;
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IR::RegisterAllocationPass *RAPass {};
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};
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}
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