Ryan Houdek f51832ca6b FEXCore: Fixes a bug with VPSRLDQ/VPSLLDQ with >= 16-byte shifts ...

When the shift amount is >= 16-bytes then we need to zero the register.
We had a bug where we were assigning `Result.High` to itself, which
effectively made the top 128-bits of the ymm register not modify itself.

Adds a unit test to ensure that doesn't happen again.

2024-09-08 15:39:22 -07:00

..

Config

LinuxEmulation: Implement support for seccomp

2024-09-02 14:07:53 -07:00

Context

FEXCore: Move CustomIRResult to internal header

2024-09-05 13:36:15 -07:00

Core

FEXCore: Fixes a bug with VPSRLDQ/VPSLLDQ with >= 16-byte shifts

2024-09-08 15:39:22 -07:00

GDBJIT

Whole-tree reformat

2024-04-12 16:26:02 +02:00

HLE/Thunks

Thunks: Removes global static initializer

2024-08-31 01:58:35 -07:00

IR

Merge pull request #4049 from alyssarosenzweig/opt/constprop-merges

2024-09-08 10:13:23 -07:00