Commit Graph
953 Commits
Author SHA1 Message Date
Stefanos Kornilios Mitsis Poiitidis fa35e79c3f arm64: Fix lr pushing 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis bcf382afc4 Interpreter: Fix LSHR to correctly zero extend 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 193a72aa56 SRA: Address review feedback 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 94fb009f4b SRA: Address review feedback 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 5fd77f8228 arm64: Fix FPR spilling 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 41285865ba arm64: Fix asserts 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis c95d40e9be arm64: Spill/Fill static ra around OP_SYSCALL 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 82545796b8 static-ra: Use LogMan::* instead of assert/printf 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 2ed8163a98 arm64: Cleanup & optimize Static and Dynamic spills on call 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis b3600a453c RA/SRA: Don't read-alias not full sized regs, it is not safe 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 30d7c02b60 arm64: Really fix Popcount to take into account opsize 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 5f481ff56d IR: Fix Ashr, Ror OpSize calculation 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis c518151800 IR: Fix Lshr op size detection 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 20a9b93019 OpDisp: Fix CondJUMPRCXOp 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 76367f0afc arm64: Remove some debug logic 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis c20b27965d arm64: Fix Popcount to take into account opsize 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 6e053f0055 arm64: Fix IsGPR && IsFPR for SRA 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 80d1766bf0 arm64: Correctly handle signal and SRA interactions 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis a1f7c7da55 arm64: Fix Exit handler calling from signal 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis de0ed19e86 Arm64: Fix build for CreateRegPair 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis cdb2075522 X64: Fix RegisterClasses Count 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 5a3c55f621 RA: Fix Class Conflicts 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 204fda62f1 IR: Fix CreateElementPair edge cases, Remove Load/StoreContextPair 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis fbe87101db IR: Remove Load/StoreContextPair 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 17dc0bfcd8 SRA: Only do read-alias if accessing low part of register 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis c67aa0b83d OpDisp: Don't use LoadContextPair, it is kludgy and breaks SRA 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 9c5a1fd5ea SRA: Static Register Allocation, arm64 only 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis f724392ef8 Merge pull request #601 from Sonicadvance1/fix_cvtsi2ss_64bit
Adds support for proper sized GPR->FPR sized conversions
2021-01-05 12:03:33 +02:00
Ryan Houdek 4907bda639 Adds support for proper sized GPR->FPR sized conversions
Both x86 and AArch64 support converting from one sized GPR to another
sized FPR. Expose it in our IR op.

Fixes a bug in CVTSI2SS with a 64bit source and it was treating the
input source as a 32bit value.

eg:
0x0000'0000'FFFF'FFFF was treated as converting to -1 float, which was wrong since it is a 64bit value
2020-12-30 10:07:12 -08:00
Ryan Houdek 8bd76885ea Implements the rest of the prefetch ops and nops
Prefetch is highly architecture specific and a lot of these don't
actually map 1:1 with AArch64 anyway.
Just nop out
2020-12-27 19:10:41 -08:00
Stefanos Kornilios Mitsis Poiitidis 3cfae8ab30 Merge pull request #588 from Sonicadvance1/32bit_table_fixes
Fixes some tables definitions for 32bit
2020-12-25 15:15:36 +02:00
Stefanos Kornilios Mitsis Poiitidis 2fbf22a9de Hotfix: Disable ConstProp/RemoveUselessMasking, add a test for it 2020-12-25 15:04:27 +02:00
Ryan Houdek 69de873c34 Fixes some tables definitions for 32bit 2020-12-19 19:33:28 -08:00
Stefanos Kornilios Mitsis Poiitidis ef75b8e4ec Merge pull request #582 from Sonicadvance1/move_syscalls
Moves FEXCore's SignalDelegator and SyscallHandler to the frontend
2020-12-16 12:52:39 +02:00
Ryan Houdek e50a03fcdc Some warning fixes and uninitialized values fixes in ConstProp 2020-12-14 04:00:04 -08:00
Ryan Houdek ba134ea634 Fixes a bug in RA that valgrind found
Needs to ensure the interference list only checks against the class
interference if that register fits in its array.

Checking only empty wasn't good enough, check the array size first.
2020-12-14 03:56:39 -08:00
Ryan Houdek 232fac8fb7 Makes sure to memset the invalid node
Valgrind caught it relying on uninitialized values
2020-12-14 03:56:04 -08:00
Ryan Houdek 37983006f0 Moves FEXCore's SignalDelegator and SyscallHandler to the frontend
Sadly these things can't be split without breaking functionality so it
turns in to a bit of a mess.

SyscallHandler is very much something that is a Linux only construct and
shouldn't be in FEXCore itself. Lets the frontend register a
Syscallhandler with FEXCore. FEXCore itself is then aware of the current
syscall ABI and handles the ABI in an optimal fashion.
So it is not a 100% clean break otherwise we would lose performance.

The SignalDelegator then needs to move to the frontend since the
SyscallHandler requires it for signal based syscalls.
The CPU backend signal handling still needs to happen in FEXCore because
it is a very tight coupling with the CPU backend.
Once we need to support more Signal handling we can give the backends
cleaner support to select which specific OS handler to handle.
2020-12-13 22:38:04 -08:00
Stefanos Kornilios Mitsis Poiitidis 22629b6f5a ConstProp: Remove ROR case, ROR no longer exists 2020-12-12 12:10:14 +02:00
Stefanos Kornilios Mitsis Poiitidis 0df84be18c ConstProp: Remove some BFEs that do nothing 2020-12-12 12:10:14 +02:00
Stefanos Kornilios Mitsis Poiitidis 784cd648f1 ConstProp: SBFE useless masking elim, VMOV elim 2020-12-12 12:10:14 +02:00
Stefanos Kornilios Mitsis Poiitidis 60ce62cb2d ConstProp: Special case BFE, AND in RemoveUselessMasking sub-pass 2020-12-12 12:10:14 +02:00
Stefanos Kornilios Mitsis Poiitidis 5eb42e4490 ConstProp: Documented different sub-passes, remove leftover continue; statements 2020-12-12 12:10:14 +02:00
Stefanos Kornilios Mitsis Poiitidis b2eeb104f7 ConstProp: Add RemoveUselessMasking, implement for a few ops 2020-12-12 12:10:14 +02:00
Ryan Houdek 36b24ad141 Removes all uses of non-unified memory and SHM regions
Let's just delete the whole thing!
2020-12-10 02:09:52 -08:00
Ryan Houdek 899e24abd0 Removes non-unified memory path from Interpreter 2020-12-10 02:01:14 -08:00
Ryan Houdek dc8caeaf91 Removes non-unified memory path from x86_64 2020-12-10 02:01:14 -08:00
Ryan Houdek 8e3ac44e65 Removes non-unified memory path from ARM64 2020-12-10 02:01:14 -08:00
Stefanos Kornilios Mitsis Poiitidis 6d671166e4 Merge pull request #578 from Sonicadvance1/more_robust_interpreter_check
More robust FEXInterpreter checks
2020-12-10 11:37:21 +02:00
Ryan Houdek 01831ec264 Check for binfmt_misc install and run directly only if installed
If we want to execve files directly we need to ensure that the
binfmt_misc interpreter path is installed.
If it isn't installed then we need to fall down the regular path of
pushing FEX to the front of the argument list.
2020-12-09 20:34:03 -08:00