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Code Issues Packages Projects Releases 67 Wiki Activity
2,125 Commits 11 Branches 71 Tags
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Commit Graph
82 Commits
Author SHA1 Message Date
Stefanos Kornilios Mitsis Poiitidis 8e06966ddc AOTIR: Make OP_REMOVECODEENTRY relocatable 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 56d10dcbbb IR: Make OP_THUNK use an inline sha256 hash of the thunk name, update thunk scripts 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 63507f5ece IR: Fix int64_t parsing 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 681deca4eb IR: Make entrypoint implicit, Add InlineEntrypointOffset, make ValidateCode Entrypoint-relative 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 47d4481a75 AOTIR: Support relocations via new ir op 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 6615d5972f x87: Support for FCW, rounding, truncation, precision control 2021-02-17 05:16:53 +02:00
Stefanos Kornilios Mitsis Poiitidis 07bd2244c7 IR: Remove ShouldInterpret & related logic 2021-02-12 14:21:47 +02:00
Stefanos Kornilios Mitsis Poiitidis 0e00d3dc15 RA: Optimize RAData 2021-01-29 10:42:48 +02:00
Ryan Houdek d4ffea5c31 Merge pull request #670 from FEX-Emu/skmp/faster-ra 
IR: Optimize runtime of optimization passes
 2021-01-22 04:54:08 -08:00
Stefanos Kornilios Mitsis Poiitidis 13613c6de1 IR: Change ValidateCode to use two uint64_t instead of __uint128_t 2021-01-21 21:37:58 +02:00
Stefanos Kornilios Mitsis Poiitidis ac1036ac92 IR: Sync Invalid class with RA 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis f3d5635182 IR: Make ExitFunction take NewRip as an argument, instead of implicit ctx store 2021-01-08 18:41:33 +02:00
Stefanos Kornilios Mitsis Poiitidis 5f481ff56d IR: Fix Ashr, Ror OpSize calculation 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis c518151800 IR: Fix Lshr op size detection 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 204fda62f1 IR: Fix CreateElementPair edge cases, Remove Load/StoreContextPair 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 9c5a1fd5ea SRA: Static Register Allocation, arm64 only 2021-01-05 17:14:57 +02:00
Ryan Houdek 4907bda639 Adds support for proper sized GPR->FPR sized conversions 
Both x86 and AArch64 support converting from one sized GPR to another
sized FPR. Expose it in our IR op.

Fixes a bug in CVTSI2SS with a 64bit source and it was treating the
input source as a 32bit value.

eg:
0x0000'0000'FFFF'FFFF was treated as converting to -1 float, which was wrong since it is a 64bit value
 2020-12-30 10:07:12 -08:00
Stefanos Kornilios Mitsis Poiitidis b044413952 OpDisp, IR, Backends: Add Float compares to Select, CondJump, COND_F* 2020-12-04 15:30:55 +02:00
Ryan Houdek 439d49b802 Merge pull request #550 from FEX-Emu/skmp/improve-dead-flags 
DFSE: Fix dead clag calculation, Extend InvalidateFlags
 2020-12-03 20:18:43 -08:00
Stefanos Kornilios Mitsis Poiitidis b2d862a8c7 IR: Replace Sext with Sbfe 2020-12-03 20:08:08 +02:00
Stefanos Kornilios Mitsis Poiitidis d7316fe2d0 OpDisp, IR: Extend InvalidateFlags to invalidate a bitfield, invalidate PF when not emulated 2020-12-03 18:38:16 +02:00
Scott Mansell ee98cbfe3f IR: Remove Rol as it's not native to ARM 2020-11-26 14:00:24 +13:00
Scott Mansell 5b1d4eadd4 IR: Make BFI sizes explicit 
Otherwise they can be quite hard to get right.
 2020-11-26 12:40:37 +13:00
Stefanos Kornilios Mitsis Poiitidis f38179913a IR: Swith MemoryOffsetType to a type from uint8_t 2020-11-17 16:23:50 +02:00
Stefanos Kornilios Mitsis Poiitidis 9fdd2a5b10 LoadMem/StoreMem: Add OffsetType, OffsetScale 2020-11-17 16:23:50 +02:00
Stefanos Kornilios Mitsis Poiitidis 74254a1a9c IR: Load/Store mem with two args 2020-11-17 16:23:48 +02:00
Ryan Houdek deaf879e78 Merge pull request #490 from FEX-Emu/skmp/extended-condjump-branching 
CondJump: Add support for two operands to match Select
 2020-11-17 01:19:21 -08:00
Stefanos Kornilios Mitsis Poiitidis 8fc6f73571 IR: InvalidateFlags + --abi-local-flags 
- InvalidateFlags pseudo-op is a hint for the Dead Flags Elimination pass that flags are not needed past that point
- Adds a new option, --abi-local-flags, that invalidates the flags on CALLs or RETs. This might break code that doesn't follow the ABI rules.
 2020-11-17 11:08:29 +02:00
Stefanos Kornilios Mitsis Poiitidis eafe853c75 CondJump: Switch to two arguments + Cond for flexible branching 2020-11-06 10:54:52 +02:00
Stefanos Kornilios Mitsis Poiitidis 2abfe71c42 Select: Add compare & Data sizes, cset/setcc specializations 
- CompareSize can be 4 or 8
- DataSize can be 4 or 8
- Support for INLINE_CONSTANTS for `Select cmp1,cmp2,1,0` that specializes to cset / setcc
 2020-11-05 19:46:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 93e372c7a4 IR/JITs: Inline Constants Implementation 
Based on @phire's idea, Inline constants are constants that can be used as imms in instructions.

This
- Adds OP_INLINECONSTANT to represent them in the IR
- Modifies the ConstProp pass to transform OP_CONSTANT to OP_INLINECONSTANT based on per-platform heuristics
- Modifies the backends to use imms
- Supported opcodes: Add, Sub, Lsl, Lsr, Asr, Ror, Rol
 2020-10-22 18:49:17 +03:00
Ryan Houdek 2c2d73839b Adds new AES IR ops 2020-09-30 00:05:55 -07:00
Ryan Houdek badc7f6562 Merge pull request #434 from Sonicadvance1/pmulhrsw 
Implements SSSE3 PMULHRSW
 2020-09-27 10:38:14 -07:00
Ryan Houdek 62158d4f8c Implements new VectorImm IR op 2020-09-26 15:30:20 -07:00
Ryan Houdek 83ac23be21 Implements new VTBL1 IR op 
This perfectly matches the AArch64 variant and almost perfectly matches
x86's pshufb instruction
 2020-09-26 12:59:34 -07:00
Stefanos Kornilios Mitsis Poiitidis 83db01f505 Merge pull request #429 from Sonicadvance1/psign 
Implements support for SSSE3 PSIGN{B,W,D}
 2020-09-26 20:20:06 +03:00
Stefanos Kornilios Mitsis Poiitidis de62124b95 Merge pull request #428 from Sonicadvance1/lzcnt 
Implements ABM's LZCNT instruction
 2020-09-26 20:11:47 +03:00
Ryan Houdek c6385093eb Adds a few new IR ops 
VectorZero, useful to generate a zero vector without any previous
dependencies

and comparisons with zero which ARM supports faster versions of
 2020-09-24 19:34:19 -07:00
Ryan Houdek 479505b069 Implements new CountLeadingZeroes IR op 2020-09-23 22:13:28 -07:00
Ryan Houdek 6c37a4dea6 Adds support for BCD x87 intructions 2020-09-22 23:56:03 -07:00
Ryan Houdek e4182108f6 Adds new IR ops for supporting host rounding mode conversion 2020-09-22 18:42:23 -07:00
Scott Mansell 5048753e37 Undo limitation of ASHR to 32/64bit 
This should really be done later in a sperate PR.

 1. We don't have proper unit test coverage
 2. I still didn't get this right at time of removal
 3. I haven't done the jit changes to go along with this.
 2020-09-17 16:26:41 +12:00
Scott Mansell 96603495ec OpcodeDispatcher: Remove BFEs from flag-gen calls 2020-09-17 14:59:50 +12:00
Ryan Houdek d424cf0eee Merge pull request #365 from phire/IR_iterators 
Refactor the IR Interface to prevent "foot-shooting"
 2020-09-16 11:24:44 -07:00
Ryan Houdek addcb824e2 Merge pull request #390 from FEX-Emu/skmp/add-pendatic-smc 
SMC: Add --smc-full-checks, implement frontend, irint, irjit, unit test
 2020-09-16 09:26:35 -07:00
Stefanos Kornilios Mitsis Poiitidis df3bdf361f SMC: Add --smc-full-checks, implement frontend, irint, irjit, unit test 2020-09-16 01:15:21 +03:00
Ryan Houdek 8878278402 Implements new EXTR IR op 
This maps directly to AArch64's EXTR op.
Maps closely to x86's SHRD instruction
 2020-09-13 17:28:09 -07:00
Ryan Houdek e9b74b0230 Initial Callback support 
This interface is for native host code to be able to call back in to JIT
to execute guest code.
This is mainly for thunks but could be used for other purposes.
This can cross a couple ABI boundaries so one must be careful when
calling in to this
 2020-09-11 15:48:51 -07:00
Scott Mansell e756b46189 Allow AllNodes to iterate in reverse 
We replace Dummy with the old unused BeginBlock
and pointing it at block header like EndBlock
 2020-09-11 21:50:30 +12:00
Scott Mansell 446b261f24 Iterator for blocks 2020-09-11 21:48:03 +12:00