steam-frame/FEX-Emu--FEX
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Code Issues Packages Projects Releases 67 Wiki Activity
2,125 Commits 11 Branches 71 Tags
d930de30efe995a48ea46bbcd87f98feb082fa25
Commit Graph
273 Commits
Author SHA1 Message Date
Stefanos Kornilios Mitsis Poiitidis cbf4c9a687 ConstProp: Restrict imm code motion around selects to matching sizes, fixes dav1d 2021-03-09 11:06:16 +02:00
Stefanos Kornilios Mitsis Poiitidis 6d0d3eaf04 AOTIR: Review feedback 2021-02-23 12:23:56 +02:00
Stefanos Kornilios Mitsis Poiitidis 8e06966ddc AOTIR: Make OP_REMOVECODEENTRY relocatable 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 56d10dcbbb IR: Make OP_THUNK use an inline sha256 hash of the thunk name, update thunk scripts 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 63507f5ece IR: Fix int64_t parsing 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 681deca4eb IR: Make entrypoint implicit, Add InlineEntrypointOffset, make ValidateCode Entrypoint-relative 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 47d4481a75 AOTIR: Support relocations via new ir op 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 816c4656df IR: Add AOT Cache 2021-02-23 12:08:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 6615d5972f x87: Support for FCW, rounding, truncation, precision control 2021-02-17 05:16:53 +02:00
Stefanos Kornilios Mitsis Poiitidis 9f2d49026e Merge pull request #768 from FEX-Emu/skmp/fix-csgo 
Fixes for Counter Strike Global Offensive
 2021-02-15 03:47:14 +02:00
Stefanos Kornilios Mitsis Poiitidis 07bd2244c7 IR: Remove ShouldInterpret & related logic 2021-02-12 14:21:47 +02:00
Stefanos Kornilios Mitsis Poiitidis 4e31c1d1ce RA: Remove erratic assert 2021-02-11 14:31:53 +02:00
Scott Mansell 5b0ade0bd8 Fix power of 2 OP_MUL optimisation 
The new left-shift that replaced the multiply takes
it's size from arg[0]. If arg[0] was 64bit and the original
OP_MUL was 32bit, then the original code would truncate
upper bits, and the replacement code wouldn't.

This bug broke the SSL cert checking code in geekbench,
causing it to fail to upload results.
Fixes #647
 2021-02-07 18:49:47 +13:00
Scott Mansell 93d5cdde1f Fix missing libc++ includes 
gnu's libc++ is lenient and allows you to miss includes at times.

Android's binoic is more strict and needs these fixes to build.
 2021-02-01 21:08:45 +13:00
Scott Mansell ebb05b56e4 Merge pull request #739 from Sonicadvance1/remove_warnings_10 
Removes warning from Static Register Allocation Pass
 2021-02-01 17:31:39 +13:00
Scott Mansell f5dd0fea5d Merge pull request #742 from Sonicadvance1/remove_warnings_8 
Removes warning from IRCompaction
 2021-02-01 17:31:28 +13:00
Scott Mansell 9c81fbb2fd Merge pull request #736 from Sonicadvance1/remove_warnings_6 
Removes warning from IRDumper
 2021-02-01 16:42:52 +13:00
Scott Mansell a156210064 Merge pull request #738 from Sonicadvance1/remove_warnings_9 
Removes warnings from Register Allocation Pass
 2021-02-01 16:32:05 +13:00
Ryan Houdek d1161de4e4 Removes warning from Static Register Allocation Pass 2021-01-31 08:00:58 -08:00
Ryan Houdek 0c3ddd3016 Removes warnings from Register Allocation Pass 2021-01-31 08:00:28 -08:00
Ryan Houdek 5c9848650c Removes warning from IRCompaction 2021-01-31 07:59:59 -08:00
Ryan Houdek a90e2268f9 Removes warning from DeadStoreElimination 2021-01-31 07:59:26 -08:00
Ryan Houdek 175078b739 Removes warning from IRDumper 2021-01-31 07:58:58 -08:00
Stefanos Kornilios Mitsis Poiitidis 972219043d Core: Refactor compilation driver, lifetime of objects 2021-01-29 10:42:55 +02:00
Stefanos Kornilios Mitsis Poiitidis 0e00d3dc15 RA: Optimize RAData 2021-01-29 10:42:48 +02:00
Stefanos Kornilios Mitsis Poiitidis a45c2c34e9 RA: Use RAData directly 2021-01-29 10:42:40 +02:00
Stefanos Kornilios Mitsis Poiitidis 513112919b RA: Move allocation data to RAData 2021-01-29 10:42:40 +02:00
Ryan Houdek d4ffea5c31 Merge pull request #670 from FEX-Emu/skmp/faster-ra 
IR: Optimize runtime of optimization passes
 2021-01-22 04:54:08 -08:00
Stefanos Kornilios Mitsis Poiitidis 0546da7a75 Address review feedback 2021-01-22 11:01:36 +02:00
Stefanos Kornilios Mitsis Poiitidis 8b025d4c26 IRLoader: Actually set EntryRIP if the IR was parsed 2021-01-21 22:19:16 +02:00
Stefanos Kornilios Mitsis Poiitidis 13613c6de1 IR: Change ValidateCode to use two uint64_t instead of __uint128_t 2021-01-21 21:37:58 +02:00
Stefanos Kornilios Mitsis Poiitidis 1177c375ff IR: Further parser cleanups, add fence types 2021-01-21 21:17:27 +02:00
Stefanos Kornilios Mitsis Poiitidis 072067b5fd IR: Split parser from IRLoader, add IR::Parse() 2021-01-21 19:17:51 +02:00
Stefanos Kornilios Mitsis Poiitidis 00ca576644 IRCompaction: Only memset in debug 2021-01-21 13:06:43 +02:00
Stefanos Kornilios Mitsis Poiitidis 036771d825 IR: Fix Printing and Parsing for float conds 2021-01-21 10:16:08 +02:00
Stefanos Kornilios Mitsis Poiitidis 0e7db64ac7 RA: Run compation after spilling, not before 2021-01-21 01:01:02 +02:00
Stefanos Kornilios Mitsis Poiitidis ac1036ac92 IR: Sync Invalid class with RA 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis 9c462eb400 ConsProp: Revert to ordered set for identical codegen 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis 8aef9cb6a7 RA: Exit after first spill per iteration is found 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis d3fc85e18d RA: Make spans at least 1 offset long 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis 9f3ce47917 RA: Expire ending intervals before starting new ones 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis e7e6b6654f RA: Cleanups 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis c3682f9a3b RA: Fix several bugs, get rid of virtual registers, remove unused complexity 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis 47ee9af96c ConstProp: Keep pools in heap 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis 10b6fb02c4 RA: Rename CalculatePrecessors to CalculatePredecessors 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis 9c760ff83b RA: Get OP_JUMP/CONDJUMP without loop in CalculatePrecessors 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis f3e19ef015 DSE: No need to loop to find branching op 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis 6bdf785223 DSE: Optimize map lookups 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis 997650bafc DSE: Merge logic more for perf 2021-01-20 04:26:06 +02:00
Stefanos Kornilios Mitsis Poiitidis 56ca73191d DSE: Merge Flag/GPR/FPR passes for perf 2021-01-20 04:26:06 +02:00